PIC18LF4682-I/PT Microchip Technology, PIC18LF4682-I/PT Datasheet - Page 119

• Manufacturer Part Number: PIC18LF4682-I/PT
• Description: 80KB Flash, 3KB RAM, ECAN, 1024 EEPROM 44 TQFP 10x10x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4682-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 80KB (40K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 9-3:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
INT2IP
R/W-1
Interrupt flag bits are set when an interrupt condition occurs regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.
INT2IP: INT2 External Interrupt Priority bit
1 = High priority
0 = Low priority
INT1IP: INT1 External Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
INT2IE: INT2 External Interrupt Enable bit
1 = Enables the INT2 external interrupt
0 = Disables the INT2 external interrupt
INT1IE: INT1 External Interrupt Enable bit
1 = Enables the INT1 external interrupt
0 = Disables the INT1 external interrupt
Unimplemented: Read as ‘0’
INT2IF: INT2 External Interrupt Flag bit
1 = The INT2 external interrupt occurred (must be cleared in software)
0 = The INT2 external interrupt did not occur
INT1IF: INT1 External Interrupt Flag bit
1 = The INT1 external interrupt occurred (must be cleared in software)
0 = The INT1 external interrupt did not occur
INT1IP
R/W-1
INTCON3: INTERRUPT CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
U-0
—
PIC18F2682/2685/4682/4685
INT2IE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INT1IE
R/W-0
U-0
—
x = Bit is unknown
INT2IF
R/W-0
DS39761C-page 119
INT1IF
R/W-0
bit 0