PIC18LF4580-I/ML Microchip Technology, PIC18LF4580-I/ML Datasheet - Page 9

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC

PIC18LF4580-I/ML

Manufacturer Part Number
PIC18LF4580-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4580-I/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
A/d Bit Size
10 bit
A/d Channels Available
11
Height
0.88 mm
Length
8 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
8 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10. Module: ECAN Technology
EXAMPLE 4:
 2010 Microchip Technology Inc.
Under specific conditions, the TXBnSIDH register
of the pending message for transmission may be
corrupted. This occurs when the following
conditions exist:
• A transmit message is pending.
• All of the receive buffers are full and a received
• A receive buffer is made available (RXFUL
If (RXBnOVFL == 1)
message is in the Message Assembly Buffer
(MAB).
(RXBxCON<7>) set to ‘0’) at either of the
following times:
- When a Start-of-Frame (SOF) is recognized
- On the instruction cycle prior to the SOF
The timing of this event is crucial.
on the CAN bus
{
}
Temp_RXREG = RXBx;
If (MyFlag)
{
}
If (TXREQ == 1)
{
}
TXREQ = 1;
MyFlag = 0;
DISABLING A PENDING TRANSMISSION
TXREQ = 0;
If (TXABT == 1)
MyFlag = 1;
PIC18F2480/2580/4480/4580
// Has an overflow occurred?
// Is a transmission pending?
// Clear transmit request
// Store transmission aborted status value
// Read receive buffer
// Was previous transmission aborted?
// Set transmit request
// Reset stored transmission aborted status
Work around
Ensure that a receive buffer overflow condition
does not occur and/or ensure that a transmit
request is not pending if a receive buffer
overflow condition does exist.
The pseudo code segment in Example 4 is an
example of how to disable a pending transmission.
This code is for illustration purposes only.
Affected Silicon Revisions
A1
X
B0
B2
DS80496C-page 9

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