PIC18LF4480-I/ML Microchip Technology, PIC18LF4480-I/ML Datasheet - Page 339
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4480-I/ML
Manufacturer Part Number
PIC18LF4480-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18LF2480-ISP.pdf
(14 pages)
Specifications of PIC18LF4480-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18LF2480-ISP PDF datasheet #4
- Current page: 339 of 490
- Download datasheet (9Mb)
24.9.1
The microcontroller clock frequency generated from a
PLL circuit is subject to a jitter, also defined as Phase
Jitter or Phase Skew. For its PIC18 Enhanced micro-
controllers, Microchip specifies phase jitter (P
being 2% (Gaussian distribution, within 3 standard
deviations, see parameter F13 in Table 28-7) and Total
Jitter (T
FIGURE 24-5:
Once these considerations are taken into account, it is
possible to show that the relation between the jitter and
the total frequency error can be defined as:
where jitter is expressed in terms of time and NBT is the
Nominal Bit Time.
© 2009 Microchip Technology Inc.
jitter
Nominal Clock
Clock with Jitter
CAN Bit Time
with Jitter
) as being 2*P
EXTERNAL CLOCK, INTERNAL
CLOCK AND MEASURABLE JITTER
IN HS-PLL BASED OSCILLATORS
Δf
=
----------------------- -
10 NBT
T
×
EFFECTS OF PHASE JITTER ON THE MICROCONTROLLER CLOCK
AND CAN BIT TIME
jitter
jitter
.
=
----------------------- -
10 NBT
2 P
×
×
jitter
PIC18F2480/2580/4480/4580
jitter
) as
Phase Skew (Jitter)
CAN Bit Jitter
The CAN protocol uses a bit-stuffing technique that
inserts a bit of a given polarity following five bits with the
opposite polarity. This gives a total of 10 bits transmit-
ted without re-synchronization (compensation for jitter
or phase error).
Given the random nature of the jitter error added, it can
be shown that the total error caused by the jitter tends
to cancel itself over time. For a period of 10 bits, it is
necessary to add only two jitter intervals to correct for
jitter-induced error: one interval in the beginning of the
10-bit period and another at the end. The overall effect
is shown in Figure 24-5.
For example, assume a CAN bit rate of 125 Kb/s, which
gives an NBT of 8 µs. For a 16 MHz clock generated
from a 4x PLL, the jitter at this clock frequency is:
and resultant frequency error is:
2
-------------------------------------- -
10
×
2%
(
×
1.25
(
8
×
×10
-------------------
16 MHz
×10
6 –
1
–
9
)
)
=
=
3.125
-----------------
16
0.02
×10
×10
6
–
5
=
DS39637D-page 339
=
1.25ns
0.0031%
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