PIC18LF24J10T-I/SS Microchip Technology, PIC18LF24J10T-I/SS Datasheet - Page 165

no-image

PIC18LF24J10T-I/SS

Manufacturer Part Number
PIC18LF24J10T-I/SS
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF24J10T-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180012 - MODULE PLUG-IN 18LF25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18LF24J10T-I/SSTR
REGISTER 16-6:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
R/W-0
GCEN
If the I
writes to the SSPxBUF are disabled).
GCEN: General Call Enable bit
1 = Enable interrupt when a general call address (0000h) is received in the SSPxSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK<5:2>: Slave Address Mask Select bits
1 = Masking of corresponding bits of SSPxADD enabled
0 = Masking of corresponding bits of SSPxADD disabled
ADMSK1: Slave Address Least Significant bit(s) Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SSPxADD<1> only enabled
0 = Masking of SSPxADD<1> only disabled
In 10-Bit Addressing mode:
1 = Masking of SSPxADD<1:0> enabled
0 = Masking of SSPxADD<1:0> disabled
SEN: Stretch Enable bit
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
ACKSTAT
2
R/W-0
C module is active, this bit may not be set (no spooling) and the SSPxBUF may not be written (or
SSPxCON2: MSSPx CONTROL REGISTER 2 (I
W = Writable bit
‘1’ = Bit is set
ADMSK5
R/W-0
(1)
ADMSK4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F45J10 FAMILY
ADMSK3
R/W-0
ADMSK2
2
R/W-0
C™ SLAVE MODE)
x = Bit is unknown
ADMSK1
R/W-0
DS39682E-page 163
SEN
R/W-0
(1)
bit 0

Related parts for PIC18LF24J10T-I/SS