PIC18F4685-E/ML Microchip Technology, PIC18F4685-E/ML Datasheet - Page 172
![96KB, Flash, 3328bytes-RAM, 36I/O, 8-bit Family,nanoWatt,ECAN 44 QFN 8x8x0.9mm T](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4685-E/ML
Manufacturer Part Number
PIC18F4685-E/ML
Description
96KB, Flash, 3328bytes-RAM, 36I/O, 8-bit Family,nanoWatt,ECAN 44 QFN 8x8x0.9mm T
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18F4685-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
80KB (40K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4685-E/ML
Manufacturer:
MICROCHIP
Quantity:
3 000
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 172 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
The CCPR1H register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the equation.
TABLE 15-4:
15.4.3
The PWM auto-shutdown features of the Enhanced
CCP1 module are available to ECCP1 in PIC18F4682/
4685 (40/44-pin) devices. The operation of this feature
is discussed in detail in Section 16.4.7 “Enhanced
PWM Auto-Shutdown”.
Auto-shutdown features are not available for CCP1.
DS39761C-page 172
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
PWM Frequency
PWM AUTO-SHUTDOWN
(ECCP1 ONLY)
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
2.44 kHz
FFh
16
14
9.77 kHz
FFh
12
4
39.06 kHz
EQUATION 15-3:
15.4.4
The following steps should be taken when configuring
the CCP1 module for PWM operation:
1.
2.
3.
4.
5.
Note:
FFh
10
1
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
appropriate TRIS bit.
Set the TMR2 prescale value, then enable
Timer2 by writing to T2CON.
Configure the CCP1 module for PWM operation.
PWM Resolution (max) =
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
SETUP FOR PWM OPERATION
156.25 kHz
3Fh
1
8
© 2009 Microchip Technology Inc.
312.50 kHz
log
1Fh
1
7
log(2)
⎛
⎝
F
F
PWM
OSC
⎞
⎠
416.67 kHz
bits
6.58
17h
1
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