PIC18F4680-E/PT Microchip Technology, PIC18F4680-E/PT Datasheet - Page 278
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F4680-E/PT
Manufacturer Part Number
PIC18F4680-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18F4680-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4680-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4585-IPT PDF datasheet #3
- PIC18F4585-IPT PDF datasheet #4
- PIC18F4585-IPT PDF datasheet #5
- PIC18F4585-IPT PDF datasheet #6
- PIC18F4585-IPT PDF datasheet #7
- Current page: 278 of 482
- Download datasheet (9Mb)
PIC18F2585/2680/4585/4680
REGISTER 23-1:
DS39625C-page 276
bit 7-5
bit 4
bit 3-1
bit 0
bit 4-0
Mode 0
Mode 1
Mode 2
CANCON: CAN CONTROL REGISTER
bit 7
REQOP2:REQOP0: Request CAN Operation Mode bits
1xx = Request Configuration mode
011 = Request Listen Only mode
010 = Request Loopback mode
001 = Request Disable mode
000 = Request Normal mode
ABAT: Abort All Pending Transmissions bit
1 = Abort all pending transmissions (in all transmit buffers)
0 = Transmissions proceeding as normal
Mode 0:
WIN2:WIN0: Window Address bits
These bits select which of the CAN buffers to switch into the access bank area. This allows
access to the buffer registers from any data memory bank. After a frame has caused an
interrupt, the ICODE3:ICODE0 bits can be copied to the WIN3:WIN0 bits to select the correct
buffer. See Example 23-2 for a code example.
111 = Receive Buffer 0
110 = Receive Buffer 0
101 = Receive Buffer 1
100 = Transmit Buffer 0
011 = Transmit Buffer 1
010 = Transmit Buffer 2
001 = Receive Buffer 0
000 = Receive Buffer 0
Unimplemented: Read as ‘0’
Mode 1:
Unimplemented: Read as ‘0’
Mode 2:
FP3:FP0: FIFO Read Pointer bits
These bits point to the message buffer to be read.
0111:0000 = Message buffer to be read
1111:1000 = Reserved
Legend:
R = Readable bit
-n = Value at POR
REQOP2
REQOP2
REQOP2
R/W-1
R/W-1
R/W-1
REQOP1
REQOP1
REQOP1
R/W-0
R/W-0
R/W-0
REQOP0
REQOP0
REQOP0
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
Preliminary
R/S-0
ABAT
R/S-0
ABAT
R/S-0
ABAT
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
WIN2
FP3
U-0
R-0
—
R/W-0
WIN1
FP2
U-0
R-0
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WIN0
FP1
U-0
R-0
—
FP0
U-0
U-0
R-0
—
—
bit 0
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