PIC18F4585-E/PT Microchip Technology, PIC18F4585-E/PT Datasheet - Page 284
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F4585-E/PT
Manufacturer Part Number
PIC18F4585-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18F4585-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4585-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4585-IPT PDF datasheet #3
- PIC18F4585-IPT PDF datasheet #4
- PIC18F4585-IPT PDF datasheet #5
- PIC18F4585-IPT PDF datasheet #6
- PIC18F4585-IPT PDF datasheet #7
- Current page: 284 of 482
- Download datasheet (9Mb)
PIC18F2585/2680/4585/4680
23.2.2
This section describes the dedicated CAN Transmit
Buffer registers and their associated control registers.
REGISTER 23-5:
DS39625C-page 282
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Mode 1, 2
Mode 0
DEDICATED CAN TRANSMIT
BUFFER REGISTERS
bit 7
TXBIF: Transmit Buffer Interrupt Flag bit
1 = Transmit buffer has completed transmission of message and may be reloaded
0 = Transmit buffer has not completed transmission of a message
TXABT: Transmission Aborted Status bit
1 = Message was aborted
0 = Message was not aborted
TXLARB: Transmission Lost Arbitration Status bit
1 = Message lost arbitration while being sent
0 = Message did not lose arbitration while being sent
TXERR: Transmission Error Detected Status bit
1 = A bus error occurred while the message was being sent
0 = A bus error did not occur while the message was being sent
TXREQ: Transmit Request Status bit
1 = Requests sending a message. Clears the TXABT, TXLARB and TXERR bits.
0 = Automatically cleared when the message is successfully sent
Unimplemented: Read as ‘0’
TXPRI1:TXPRI0: Transmit Priority bits
11 = Priority Level 3 (highest priority)
10 = Priority Level 2
01 = Priority Level 1
00 = Priority Level 0 (lowest priority)
Legend:
C = Clearable bit
-n = Value at POR
TXBIF
TXBIF
R/C-0
R/C-0
Note 1: This bit is automatically cleared when TXREQ is set.
TXBnCON: TRANSMIT BUFFER n CONTROL REGISTERS [0 ≤ n ≤ 2]
2: While TXREQ is set, Transmit Buffer registers remain read-only. Clearing this bit in
3: These bits define the order in which transmit buffers will be transferred. They do not alter
software while the bit is set will request a message abort.
the CAN message identifier.
TXABT
TXABT
R-0
R-0
(1)
(1)
R = Readable bit
‘1’ = Bit is set
TXLARB
TXLARB
R-0
R-0
Preliminary
(1)
(1)
(2)
TXERR
TXERR
(3)
(1)
R-0
R-0
W = Writable bit
‘0’ = Bit is cleared
(1)
(1)
(1)
(1)
TXREQ
TXREQ
R/W-0
R/W-0
(2)
(2)
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
U-0
U-0
—
—
© 2007 Microchip Technology Inc.
TXPRI1
TXPRI1
R/W-0
R/W-0
(3)
(3)
TXPRI0
TXPRI0
R/W-0
R/W-0
bit 0
(3)
(3)
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