PIC18F4520-E/PT Microchip Technology, PIC18F4520-E/PT Datasheet - Page 117
![44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F4520-E/PT
Manufacturer Part Number
PIC18F4520-E/PT
Description
44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2420-IML.pdf
(412 pages)
4.PIC18F2420-IML.pdf
(16 pages)
5.PIC18F2420-IML.pdf
(8 pages)
6.PIC18F2420-IML.pdf
(6 pages)
7.PIC18F2420-IML.pdf
(8 pages)
8.PIC18F2420-IML.pdf
(4 pages)
Specifications of PIC18F4520-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4520-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2420-IML PDF datasheet #3
- PIC18F2420-IML PDF datasheet #4
- PIC18F2420-IML PDF datasheet #5
- PIC18F2420-IML PDF datasheet #6
- PIC18F2420-IML PDF datasheet #7
- PIC18F2420-IML PDF datasheet #8
- Current page: 117 of 412
- Download datasheet (7Mb)
TABLE 10-7:
© 2008 Microchip Technology Inc.
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5/P1B
RD6/PSP6/P1C
RD7/PSP7/P1D
Legend:
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; x = Don’t care
(TRIS bit does not affect port direction or is overridden for this option).
PORTD I/O SUMMARY
Function
PSP0
PSP1
PSP2
PSP3
PSP4
PSP5
PSP6
PSP7
RD0
RD1
RD2
RD3
RD4
RD5
P1B
RD6
P1C
RD7
P1D
Setting
TRIS
0
1
x
x
0
1
x
x
0
1
x
x
0
1
x
x
0
1
x
x
0
1
x
x
0
0
1
x
x
0
0
1
x
x
0
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
PIC18F2420/2520/4420/4520
Type
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
LATD<0> data output.
PORTD<0> data input.
PSP read data output (LATD<0>); takes priority over port data.
PSP write data input.
LATD<1> data output.
PORTD<1> data input.
PSP read data output (LATD<1>); takes priority over port data.
PSP write data input.
LATD<2> data output.
PORTD<2> data input.
PSP read data output (LATD<2>); takes priority over port data.
PSP write data input.
LATD<3> data output.
PORTD<3> data input.
PSP read data output (LATD<3>); takes priority over port data.
PSP write data input.
LATD<4> data output.
PORTD<4> data input.
PSP read data output (LATD<4>); takes priority over port data.
PSP write data input.
LATD<5> data output.
PORTD<5> data input.
PSP read data output (LATD<5>); takes priority over port data.
PSP write data input.
ECCP1 Enhanced PWM output, channel B; takes priority over port and
PSP data. May be configured for tri-state during Enhanced PWM
shutdown events.
LATD<6> data output.
PORTD<6> data input.
PSP read data output (LATD<6>); takes priority over port data.
PSP write data input.
ECCP1 Enhanced PWM output, channel C; takes priority over port and
PSP data. May be configured for tri-state during Enhanced PWM
shutdown events.
LATD<7> data output.
PORTD<7> data input.
PSP read data output (LATD<7>); takes priority over port data.
PSP write data input.
ECCP1 Enhanced PWM output, channel D; takes priority over port and
PSP data. May be configured for tri-state during Enhanced PWM
shutdown events.
Description
DS39631E-page 115
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