PIC18F4520-E/ML Microchip Technology, PIC18F4520-E/ML Datasheet - Page 118

• Manufacturer Part Number: PIC18F4520-E/ML
• Description: 44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4520-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP, SPI, I2C, PSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2420/2520/4420/4520
TABLE 10-8:
DS39631E-page 116
PORTD
LATD
TRISD
TRISE
CCP1CON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Note 1:
Name
(1)
These registers and/or bits are unimplemented on 28-oin devices.
PORTD Data Direction Register
PORTD Data Latch Register (Read and Write to Data Latch)
P1M1
Bit 7
RD7
IBF
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
(1)
P1M0
Bit 6
RD6
OBF
(1)
DC1B1
IBOV
Bit 5
RD5
PSPMODE
DC1B0
Bit 4
RD4
CCP1M3
Bit 3
RD3
—
CCP1M2
TRISE2
Bit 2
RD2
CCP1M1
TRISE1
Bit 1
RD1
© 2008 Microchip Technology Inc.
CCP1M0
TRISE0
Bit 0
RD0
on page
Values
Reset
52
52
52
52
51