PIC18F4455-I/ML Microchip Technology, PIC18F4455-I/ML Datasheet - Page 432
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4455-I/ML
Manufacturer Part Number
PIC18F4455-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XR1.pdf
(438 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2455-ISO.pdf
(14 pages)
5.PIC18F2455-ISO.pdf
(8 pages)
6.PIC18F2455-ISO.pdf
(26 pages)
Specifications of PIC18F4455-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PCM18XR1 PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2455-ISO PDF datasheet #4
- PIC18F2455-ISO PDF datasheet #5
- PIC18F2455-ISO PDF datasheet #6
- Current page: 432 of 438
- Download datasheet (7Mb)
PIC18F2455/2550/4455/4550
RESET ............................................................................. 343
Reset State of Registers .................................................... 52
Resets ........................................................................ 45, 291
RETFIE ............................................................................ 344
RETLW ............................................................................. 344
RETURN .......................................................................... 345
Return Address Stack ........................................................ 60
Return Stack Pointer (STKPTR) ........................................ 61
Revision History ............................................................... 419
RLCF ................................................................................ 345
RLNCF ............................................................................. 346
RRCF ............................................................................... 346
RRNCF ............................................................................. 347
S
SCK .................................................................................. 197
SDI ................................................................................... 197
SDO ................................................................................. 197
SEC_IDLE Mode ................................................................ 41
SEC_RUN Mode ................................................................ 36
Serial Clock, SCK ............................................................. 197
Serial Data In (SDI) .......................................................... 197
Serial Data Out (SDO) ..................................................... 197
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 347
Slave Select (SS) ............................................................. 197
SLEEP .............................................................................. 348
Sleep
Sleep Mode ........................................................................ 40
Software Simulator (MPLAB SIM) .................................... 364
Special Event Trigger. See Compare (CCP Module).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ............................................ 291
Special ICPORT Features ................................................ 311
SPI Mode (MSSP)
DS39632E-page 430
TXSTA (Transmit Status and Control) ..................... 244
UCFG (USB Configuration) ...................................... 168
UCON (USB Control) ............................................... 166
UEIE (USB Error Interrupt Enable) .......................... 185
UEIR (USB Error Interrupt Status) ........................... 184
UEPn (USB Endpoint n Control) .............................. 172
UIE (USB Interrupt Enable) ...................................... 183
UIR (USB Interrupt Status) ...................................... 181
USTAT (USB Status) ............................................... 171
WDTCON (Watchdog Timer Control) ....................... 304
Brown-out Reset (BOR) ........................................... 291
Oscillator Start-up Timer (OST) ............................... 291
Power-on Reset (POR) ............................................ 291
Power-up Timer (PWRT) ......................................... 291
and Associated Registers .......................................... 60
OSC1 and OSC2 Pin States ...................................... 34
Associated Registers ............................................... 206
Bus Mode Compatibility ........................................... 206
Effects of a Reset ..................................................... 206
Enabling SPI I/O ...................................................... 201
Master Mode ............................................................ 202
Master/Slave Connection ......................................... 201
Operation ................................................................. 200
Operation in Power-Managed Modes ...................... 206
Serial Clock .............................................................. 197
Serial Data In ........................................................... 197
Serial Data Out ........................................................ 197
Slave Mode .............................................................. 204
Slave Select ............................................................. 197
Slave Select Synchronization .................................. 204
SPI Clock ................................................................. 202
SPP. See Streaming Parallel Port. .................................. 191
SS .................................................................................... 197
SSPOV ............................................................................ 232
SSPOV Status Flag ......................................................... 232
SSPSTAT Register
SSPxSTAT Register
Stack Full/Underflow Resets .............................................. 62
STATUS Register .............................................................. 73
Streaming Parallel Port .................................................... 191
SUBFSR .......................................................................... 359
SUBFWB ......................................................................... 348
SUBLW ............................................................................ 349
SUBULNK ........................................................................ 359
SUBWF ............................................................................ 349
SUBWFB ......................................................................... 350
SWAPF ............................................................................ 350
T
T0CON Register
Table Pointer Operations (table) ........................................ 84
Table Reads/Table Writes ................................................. 62
TBLRD ............................................................................. 351
TBLWT ............................................................................. 352
Time-out in Various Situations (table) ................................ 49
Timer0 .............................................................................. 127
Timer1 .............................................................................. 131
Typical Connection .................................................. 201
R/W Bit .................................................................... 214
R/W Bit .................................................................... 212
Associated Registers ............................................... 196
Clocking Data .......................................................... 192
Configuration ........................................................... 191
Internal Pull-ups ....................................................... 192
Interrupts ................................................................. 194
Microcontroller Control Setup .................................. 194
Reading from (Microcontroller Mode) ...................... 195
Transfer of Data Between USB SIE
USB Control Setup .................................................. 194
Wait States .............................................................. 192
Writing to (Microcontroller Mode) ............................. 194
PSA Bit .................................................................... 129
T0CS Bit .................................................................. 128
T0PS2:T0PS0 Bits ................................................... 129
T0SE Bit .................................................................. 128
16-Bit Mode Timer Reads and Writes ...................... 128
Associated Registers ............................................... 129
Clock Source Edge Select (T0SE Bit) ..................... 128
Clock Source Select (T0CS Bit) ............................... 128
Operation ................................................................. 128
Overflow Interrupt .................................................... 129
Prescaler ................................................................. 129
Prescaler. See Prescaler, Timer0.
16-Bit Read/Write Mode .......................................... 133
Associated Registers ............................................... 136
Interrupt ................................................................... 134
Operation ................................................................. 132
Oscillator .......................................................... 131, 133
Overflow Interrupt .................................................... 131
Resetting, Using a Special Event
Special Event Trigger (ECCP) ................................. 152
and SPP (diagram) .......................................... 194
Switching Assignment ..................................... 129
Layout Considerations ..................................... 134
Low-Power Option ........................................... 133
Using Timer1 as a Clock Source ..................... 133
Trigger Output (CCP) ...................................... 134
© 2009 Microchip Technology Inc.
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