PIC18F4423T-I/ML Microchip Technology, PIC18F4423T-I/ML Datasheet - Page 32
![16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanoWatt 44 QFN 8x8x0.9mm T/R](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4423T-I/ML
Manufacturer Part Number
PIC18F4423T-I/ML
Description
16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanoWatt 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
Specifications of PIC18F4423T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC18F4423T-I/MLTR
PIC18F2XXX/4XXX FAMILY
TABLE 5-3:
DS39622L-page 32
USBDIV
CPUDIV<1:0>
PLLDIV<2:0>
VREGEN
BORV<1:0>
BOREN<1:0>
PWRTEN
Note 1:
Bit Name
2:
The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
Not available in PIC18FXX8X and PIC18F2450/4450 devices.
PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG1L
CONFIG1L
CONFIG1L
CONFIG2L
CONFIG2L
CONFIG2L
CONFIG2L
Words
USB Clock Selection bit
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
Selects the clock source for full-speed USB operation:
1 = USB clock source comes from the 96 MHz PLL divided by 2
0 = USB clock source comes directly from the OSC1/OSC2 oscillator block;
CPU System Clock Selection bits
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
11 = CPU system clock divided by 4
10 = CPU system clock divided by 3
01 = CPU system clock divided by 2
00 = No CPU system clock divide
Oscillator Selection bits
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
Divider must be selected to provide a 4 MHz input into the 96 MHz PLL:
111 = Oscillator divided by 12 (48 MHz input)
110 = Oscillator divided by 10 (40 MHz input)
101 = Oscillator divided by 6 (24 MHz input)
100 = Oscillator divided by 5 (20 MHz input)
011 = Oscillator divided by 4 (16 MHz input)
010 = Oscillator divided by 3 (12 MHz input)
001 = Oscillator divided by 2 (8 MHz input)
000 = No divide – oscillator used directly (4 MHz input)
USB Voltage Regulator Enable bit
(PIC18F2455/2550/4455/4550, PIC18F2458/2553/4458/4553 and
PIC18F2450/4450 devices only)
1 = USB voltage regulator is enabled
0 = USB voltage regulator is disabled
Brown-out Reset Voltage bits
11 = V
10 = V
01 = V
00 = V
Brown-out Reset Enable bits
11 = Brown-out Reset is enabled in hardware only (SBOREN is disabled)
10 = Brown-out Reset is enabled in hardware only and disabled in Sleep mode
01 = Brown-out Reset is enabled and controlled by software (SBOREN is
00 = Brown-out Reset is disabled in hardware and software
Power-up Timer Enable bit
1 = PWRT is disabled
0 = PWRT is enabled
no divide
SBOREN is disabled)
enabled)
BOR
BOR
BOR
BOR
is set to 2.0V
is set to 2.7V
is set to 4.2V
is set to 4.5V
Description
2010 Microchip Technology Inc.