PIC18F4420T-I/PT Microchip Technology, PIC18F4420T-I/PT Datasheet - Page 261
PIC18F4420T-I/PT
Manufacturer Part Number
PIC18F4420T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2420-IML.pdf
(412 pages)
3.PIC18F2420-IML.pdf
(16 pages)
4.PIC18F2420-IML.pdf
(8 pages)
5.PIC18F2420-IML.pdf
(6 pages)
6.PIC18F2420-IML.pdf
(8 pages)
7.PIC18F2420-IML.pdf
(4 pages)
Specifications of PIC18F4420T-I/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4420T-I/PT
Manufacturer:
MICROCHIP
Quantity:
4 000
Company:
Part Number:
PIC18F4420T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC18F2221-ISO PDF datasheet
- PIC18F2420-IML PDF datasheet #2
- PIC18F2420-IML PDF datasheet #3
- PIC18F2420-IML PDF datasheet #4
- PIC18F2420-IML PDF datasheet #5
- PIC18F2420-IML PDF datasheet #6
- PIC18F2420-IML PDF datasheet #7
- Current page: 261 of 412
- Download datasheet (7Mb)
REGISTER 23-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
TABLE 23-2:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
Note 1:
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
Note 1:
Name
U-0
—
2:
This bit has no effect if the Configuration bit, WDTEN, is enabled.
The SBOREN bit is only available when the BOREN<1:0> Configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
This bit has no effect if the Configuration bit, WDTEN, is enabled.
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
IPEN
Bit 7
SUMMARY OF WATCHDOG TIMER REGISTERS
—
U-0
—
SBOREN
W = Writable bit
‘1’ = Bit is set
Bit 6
—
U-0
—
(1)
Bit 5
—
—
PIC18F2420/2520/4420/4520
U-0
—
Bit 4
RI
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Bit 3
TO
U-0
—
—
Bit 2
(1)
PD
—
U-0
—
Bit 1
POR
—
x = Bit is unknown
SWDTEN
U-0
—
Bit 0
BOR
DS39631E-page 259
(2)
SWDTEN
R/W-0
on page
Values
Reset
48
50
bit 0
(1)
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