PIC18F4320-E/PT Microchip Technology, PIC18F4320-E/PT Datasheet - Page 133
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F4320-E/PT
Manufacturer Part Number
PIC18F4320-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18F1320-ISS.pdf
(36 pages)
4.PIC18F2220-ISO.pdf
(394 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(8 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
9.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18F4320-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4320-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18F1320-ISS PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- PIC18F2220-ISO PDF datasheet #9
- Current page: 133 of 394
- Download datasheet (7Mb)
14.2
The Timer1 oscillator may be used as the clock source
for Timer3. The Timer1 oscillator is enabled by setting
the T1OSCEN (T1CON<3>) bit. The oscillator is a low-
power oscillator rated for 32 kHz crystals. See
Section 12.2 “Timer1 Oscillator” for further details.
14.3
The TMR3 register pair (TMR3H:TMR3L) increments
from 0000h to FFFFh and rolls over to 0000h. The
TMR3 interrupt, if enabled, is generated on overflow
which is latched in interrupt flag bit, TMR3IF
(PIR2<1>). This interrupt can be enabled/disabled by
setting/clearing TMR3 Interrupt Enable bit, TMR3IE
(PIE2<1>).
TABLE 14-1:
© 2007 Microchip Technology Inc.
INTCON
PIR2
PIE2
IPR2
TMR3L
TMR3H
T1CON
T3CON
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by the Timer3 module.
Name
Timer1 Oscillator
Timer3 Interrupt
Timer3 Low Byte Register
Timer3 High Byte Register
OSCIF
OSCIE
OSCIP
RD16
RD16
GIEH
Bit 7
GIE/
REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
T3CCP2
T1RUN
PEIE/
CMIF
CMIE
CMIP
GIEL
Bit 6
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0
TMR0IE
Bit 5
—
—
—
INT0IE
EEIF
EEIE
EEIP
Bit 4
PIC18F2220/2320/4220/4320
T3CCP1
BCLIE
BCLIP
BCLIF
RBIE
Bit 3
T3SYNC
TMR0IF
14.4
If the CCP module is configured in Compare mode
to generate
(CCP1M3:CCP1M0 = 1011), this signal will reset
Timer3. See Section 15.4.4 “Special Event Trigger”
for more information.
Timer3 must be configured for either Timer or Synchro-
nized Counter mode to take advantage of this feature.
If Timer3 is running in Asynchronous Counter mode,
this Reset operation may not work. In the event that a
write to Timer3 coincides with a Special Event Trigger
from CCP1, the write will take precedence. In this mode
of operation, the CCPR1H:CCPR1L register pair
effectively becomes the period register for Timer3.
LVDIE
LVDIP
LVDIF
Bit 2
Note:
Resetting Timer3 Using a CCP
Trigger Output
TMR1CS TMR1ON 0000 0000 u0uu uuuu
TMR3CS TMR3ON 0000 0000 uuuu uuuu
TMR3IF
TMR3IE
TMR3IP
INT0IF
Bit 1
The Special Event Triggers from the CCP
module will not set interrupt flag bit,
TMR3IF (PIR1<0>).
a
CCP2IE
CCP2IP
CCP2IF
RBIF
Bit 0
“Special
0000 000x 0000 000u
00-0 0000 00-0 0000
00-0 0000 00-0 0000
11-1 1111 11-1 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
POR, BOR
Value on
DS39599G-page 131
Event
Value on
all other
Resets
Trigger”
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