PIC18F248-E/SO Microchip Technology, PIC18F248-E/SO Datasheet - Page 60

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PIC18F248-E/SO

Manufacturer Part Number
PIC18F248-E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F248-E/SO

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
4 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Data Rom Size
256 B
Height
2.05 mm
Length
17.9 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
7.5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
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Manufacturer:
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Quantity:
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4.14
The Reset Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device Reset. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
REGISTER 4-3:
DS41159E-page 58
PIC18FXX8
RCON Register
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON: RESET CONTROL REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed
0 = The RESET instruction was executed causing a device Reset
TO: Watchdog Time-out Flag bit
1 = After power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Legend:
R = Readable bit
-n = Value at POR
R/W-0
IPEN
(must be set in software after a Brown-out Reset occurs)
U-0
U-0
W = Writable bit
‘1’ = Bit is set
R/W-1
RI
Note 1: If the BOREN configuration bit is set,
2: It is recommended that the POR bit be set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W
TO
BOR is ‘1’ on Power-on Reset. If the
BOREN configuration bit is clear, BOR is
unknown on Power-on Reset.
The BOR status bit is a “don’t care” and is
not necessarily predictable if the brown-
out circuit is disabled (the BOREN config-
uration bit is clear). BOR must then be set
by the user and checked on subsequent
Resets to see if it is clear, indicating a
brown-out has occurred.
after a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
R/W
PD
© 2006 Microchip Technology Inc.
x = Bit is unknown
R/W-0
POR
R/W-0
BOR
bit 0

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