PIC18F2431-E/MM Microchip Technology, PIC18F2431-E/MM Datasheet - Page 205

• Manufacturer Part Number: PIC18F2431-E/MM
• Description: 16 KB Flash, 768 RAM, 22 I/O 28 QFN-S 6x6m TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2431-E/MM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F2431-E/ML; PIC18F2431-E/ML

19.0
19.1
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D Converters, etc. The SSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
An overview of I
information on the SSP module can be found in the
“PIC
(DS33023).
Refer to application note AN578, “Use of the SSP
Module in the I
(DS00578).
 2010 Microchip Technology Inc.
®
Mid-Range MCU Family Reference Manual”
SYNCHRONOUS SERIAL PORT
(SSP) MODULE
SSP Module Overview
2
C™ Multi-Master Environment”
2
C operations and additional
2
C™)
PIC18F2331/2431/4331/4431
19.2
This section contains register definitions and opera-
tional characteristics of the SPI module. Additional
information on the SPI module can be found in the
”PIC
(DS33023).
SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS)
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON (SSPCON<5:0>) and
SSPSTAT<7:6> registers. These control bits allow the
following to be specified:
• Master mode (SCK is the clock output)
• Slave mode (SCK is the clock input)
• Clock polarity (Idle state of SCK)
• Clock edge (output data on rising/falling edge of
• Clock rate (Master mode only)
• Slave Select mode (Slave mode only)
SCK)
®
Mid-Range MCU Family Reference Manual”
SPI Mode
DS39616D-page 205