PIC18F1220-E/SO Microchip Technology, PIC18F1220-E/SO Datasheet - Page 28

• Manufacturer Part Number: PIC18F1220-E/SO
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1220-E/SO

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-SOIC (7.5mm Width)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F1230/1330
TABLE 5-3:
DS39752B-page 28
CP0
CPD
CPB
WRT1
WRT0
WRTD
WRTB
WRTC
EBTR1
EBTR0
EBTRB
DEV<10:3>
DEV<2:0>
Note 1:
Bit Name
The BBSIZ<1:0> bits can not be changed once any of the following code-protect bits are enabled: CPB or
CP0, WRTB or WRT0, EBTRB or EBTR0.
PIC18F1230/1330 BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG5H
CONFIG5H
CONFIG6H
CONFIG6H
CONFIG6H
CONFIG7H
CONFIG5L
CONFIG6L
CONFIG6L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
Words
Code Protection bits (Block 0 code memory area)
1 = Block 0 is not code-protected
0 = Block 0 is code-protected
Code Protection bits (Data EEPROM)
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected
Code Protection bits (Boot Block memory area)
1 = Boot Block is not code-protected
0 = Boot Block is code-protected
Write Protection bits (Block 1 code memory area)
1 = Block 1 is not write-protected
0 = Block 1 is write-protected
Write Protection bits (Block 0 code memory area)
1 = Block 0 is not write-protected
0 = Block 0 is write-protected
Write Protection bit (Data EEPROM)
1 = Data EEPROM is not write-protected
0 = Data EEPROM is write-protected
Write Protection bit (Boot Block memory area)
1 = Boot Block is not write-protected
0 = Boot Block is write-protected
Write Protection bit (Configuration registers)
1 = Configuration registers are not write-protected
0 = Configuration registers are write-protected
Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from table reads executed in other blocks
0 = Boot Block is protected from table reads executed in other blocks
Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to
identify the part number.
Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to
identify the part number.
Description
© 2009 Microchip Technology Inc.