PIC16LF87T-I/SS Microchip Technology, PIC16LF87T-I/SS Datasheet - Page 61
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LF87T-I/SS
Manufacturer Part Number
PIC16LF87T-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F87-IP.pdf
(228 pages)
4.PIC16F87-IP.pdf
(8 pages)
5.PIC16F87-IP.pdf
(4 pages)
6.PIC16F87-IP.pdf
(8 pages)
Specifications of PIC16LF87T-I/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF87T-I/SS
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC16LF627A-IP PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16F87-IP PDF datasheet #3
- PIC16F87-IP PDF datasheet #4
- PIC16F87-IP PDF datasheet #5
- PIC16F87-IP PDF datasheet #6
- Current page: 61 of 228
- Download datasheet (5Mb)
FIGURE 5-8:
2005 Microchip Technology Inc.
Note 1: I/O pins have diode protection to V
BLOCK DIAGRAM OF RB0/INT/CCP1
RBPU
Data Bus
WR PORTB
WR TRISB
To INT0 or CCP
2: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit.
3: The CCP1 pin is determined by the CCPMX bit in Configuration Word 1 register.
(2)
CCP1M<3:0> = 1000, 1001, 11xx and CCPMX = 1
CCP
RD PORTB
TRIS Latch
Data Latch
D
D
CK
CK
RD TRISB
Q
Q
0
1
DD
and V
(3)
SS
PIN
.
CCP1M<3:0> = 000
Q
EN
RD PORTB
D
TTL
Input
Buffer
V
P
PIC16F87/88
DD
Weak
Pull-up
I/O pin
(1)
DS30487C-page 59
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