PIC16LC924-04/PT Microchip Technology, PIC16LC924-04/PT Datasheet - Page 29

• Manufacturer Part Number: PIC16LC924-04/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC924-04/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the
PCLATH register. On any reset, the upper bits of the PC
will be cleared. Figure 4-9 shows the two situations for
the loading of the PC. The upper example in the figure
shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
ure shows how the PC is loaded during a CALL or GOTO
instruction (PCLATH<4:3>
FIGURE 4-9: LOADING OF PC IN
4.3.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application note “Implementing a Table Read” (AN556).
4.3.2
The PIC16CXXX family has an 8 level deep x 13-bit
wide hardware stack. The stack space is not part of
either program or data space and the stack pointer is
not readable or writable. The PC is PUSHed onto the
stack when a CALL instruction is executed or an inter-
rupt causes a branch. The stack is POPed in the event
of a RETURN, RETLW or a RETFIE instruction execu-
tion. PCLATH is not affected by a PUSH or POP oper-
ation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
PC
PC
1997 Microchip Technology Inc.
12
12 11 10
2
PCL and PCLATH
COMPUTED GOTO
STACK
5
PCH
PCLATH<4:3>
PCH
PCLATH
PCLATH<4:0>
8
DIFFERENT SITUATIONS
PCLATH
8
PCH). The lower example in the fig-
7
7
PCL
PCL
PCH).
11
8
0
0
Instruction with
PCL as
Destination
ALU result
GOTO, CALL
Opcode <10:0>
4.4
PIC16C9XX devices are capable of addressing a con-
tinuous 8K word block of program memory. The CALL
and GOTO instructions provide only 11 bits of address
to allow branching within any 2K program memory
page. When doing a CALL or GOTO instruction the
upper 2 bits of the address are provided by
PCLATH<4:3>. When doing a CALL or GOTO instruc-
tion, the user must ensure that the page select bits are
programmed so that the desired program memory
page is addressed. If a return from a CALL instruction
(or interrupt) is executed, the entire 13-bit PC is pushed
onto the stack. Therefore, manipulation of the
PCLATH<4:3> bits are not required for the return
instructions (which POPs the address from the stack).
Note:
Note 1: There are no status bits to indicate stack
Note 2: There are no instructions/mnemonics
Program Memory Paging
The
PCLATH<4>, which is used to access pro-
gram memory pages 2 and 3. The use of
PCLATH<4>
read/write bit is not recommended since
this may affect upward compatibility with
future products.
overflow or stack underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the
CALL,
instructions, or the vectoring to an inter-
rupt address.
PIC16C9XX
RETURN,
PIC16C9XX
as
a
RETLW, and RETFIE
ignores
general
DS30444E - page 29
paging
purpose
bit