PIC16LC64A-04/L Microchip Technology, PIC16LC64A-04/L Datasheet - Page 107
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PIC16LC64A-04/L
Manufacturer Part Number
PIC16LC64A-04/L
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC64A-04/L
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
PIC
Family Name
PIC16
Maximum Speed
4 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
33
Interface Type
I2C/SPI/USART
Number Of Timers
3
Processor Series
PIC16LC
Core
PIC
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC64A-04/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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12.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In asynchronous
mode bit BRGH (TXSTA<2>) also controls the baud
rate. In synchronous mode bit BRGH is ignored.
Table 12-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in master mode (internal clock).
Given the desired baud rate and Fosc, the nearest inte-
ger value for the SPBRG register can be calculated
using the formula in Table 12-1. From this, the error in
baud rate can be determined.
Example 12-1 shows the calculation of the baud rate
error for the following conditions:
TABLE 12-1:
X = value in SPBRG (0 to 255)
TABLE 12-2:
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
Address
98h
18h
99h
Legend: x = unknown, - = unimplemented read as '0'. Shaded cells are not used by the BRG.
1997 Microchip Technology Inc.
SYNC
0
1
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
USART Baud Rate Generator (BRG)
= 16 MHz
Name
TXSTA
RCSTA
SPBRG
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
Baud Rate Generator Register
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
RX9
TX9
SREN
TXEN
Bit 5
CREN
SYNC
OSC
OSC
Bit 4
/(64(X+1))
/(4(X+1))
Bit 3
—
—
EXAMPLE 12-1: CALCULATING BAUD
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register, causes the
BRG timer to be reset (or cleared), this ensures that the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
Desired Baud rate = Fosc / (64 (X + 1))
Calculated Baud Rate=16000000 / (64 (25 + 1))
Error
Note:
BRGH
FERR
Bit 2
9600 =
X
=
=
=
=
For the PIC16C63/R63/65/65A/R65 the
asynchronous
(BRGH = 1) may experience a high rate of
receive errors. It is recommended that
BRGH = 0. If you desire a higher baud rate
than BRGH = 0 can support, refer to the
device errata for additional information or
use the PIC16C66/67.
(Calculated Baud Rate - Desired Baud Rate)
=
9615
(9615 - 9600) / 9600
0.16%
OERR
OSC
TRMT
Bit 1
16000000 /(64 (X + 1))
/(16(X + 1)) equation can reduce the
Baud Rate = F
25.042 = 25
RATE ERROR
Desired Baud Rate
BRGH = 1 (High Speed)
RX9D
TX9D
Bit 0
PIC16C6X
high
0000 -010 0000 -010
0000 -00x 0000 -00x
0000 0000 0000 0000
N/A
Value on
OSC
POR,
BOR
DS30234D-page 107
/(16(X+1))
speed
Value on
all other
Resets
mode
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