PIC16F946-E/PT Microchip Technology, PIC16F946-E/PT Datasheet - Page 169

• Manufacturer Part Number: PIC16F946-E/PT
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F946-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 336 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 352 B
• Interface Type: SSP, I2C, AUSART, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, MA160011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA160011 - DAUGHTER BOARD PICDEM LCD 16F91X
• Lead Free Status / Rohs Status: Details

REGISTER 14-2:
© 2005 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3-0
SSPCON – SYNC SERIAL PORT CONTROL REGISTER (ADDRESS 14h)
bit 7
WCOL: Write Collision Detect bit
1 = The SSPBUF register is written while it is still transmitting the previous word (must be cleared
0 = No collision
SSPOV: Receive Overflow Indicator bit
In SPI™ mode:
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case of
0 = No overflow
In I
1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a “don’t
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In SPI mode:
1 = Enables serial port and configures SCK, SDO and SDI as serial port pins
0 = Disables serial port and configures these pins as I/O port pins
In I
1 = Enables the serial port and configures the SDA and SCL pins as serial port pins
0 = Disables serial port and configures these pins as I/O port pins
In both modes, when enabled, these pins must be properly configured as input or output.
CKP: Clock Polarity Select bit
In SPI mode:
1 = Idle state for clock is a high level (Microwire default)
0 = Idle state for clock is a low level (Microwire alternate)
In I
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch). (Used to ensure data setup time.)
SSPM<3:0>: Synchronous Serial Port Mode Select bits
0000 = SPI Master mode, clock = F
0001 = SPI Master mode, clock = F
0010 = SPI Master mode, clock = F
0011 = SPI Master mode, clock = TMR2 output/2
0100 = SPI Slave mode, clock = SCK pin. SS pin control enabled.
0101 = SPI Slave mode, clock = SCK pin. SS pin control disabled. SS can be used as I/O pin.
0110 =
0111 =
1011 =
1110 =
1111 =
Legend:
R = Readable bit
- n = Value at POR
WCOL
R/W-0
2
2
2
C™ mode:
C mode:
C mode:
in software)
overflow, the data in SSPSR is lost. Overflow can only occur in Slave mode. The user must read
the SSPBUF, even if only transmitting data, to avoid setting overflow. In Master mode, the over-
flow bit is not set since each new reception (and transmission) is initiated by writing to the
SSPBUF register.
care” in Transmit mode. SSPOV must be cleared in software in either mode.
I
I
I
I
I
2
2
2
2
2
C
C
C
C
C
Slave mode, 7-bit address
Slave mode, 10-bit address
Firmware Controlled Master mode (slave idle)
Slave mode, 7-bit address with Start and Stop bit interrupts enabled
Slave mode, 10-bit address with Start and Stop bit interrupts enabled
SSPOV
R/W-0
SSPEN
R/W-0
Preliminary
W = Writable bit
‘1’ = Bit is set
OSC
OSC
OSC
/4
/16
/64
R/W-0
CKP
SSPM3
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSPM2
R/W-0
PIC16F946
x = Bit is unknown
SSPM1
R/W-0
DS41265A-page 167
SSPM0
R/W-0
bit 0