PIC16F873A-E/ML Microchip Technology, PIC16F873A-E/ML Datasheet - Page 660
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F873A-E/ML
Manufacturer Part Number
PIC16F873A-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873A-ISO.pdf
(234 pages)
4.PIC16F873A-ISO.pdf
(6 pages)
5.PIC16F873A-ISO.pdf
(4 pages)
6.PIC16F873A-ISO.pdf
(6 pages)
7.PIC16F873A-ISO.pdf
(4 pages)
8.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F873A-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F873A-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- Current page: 660 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
A.4
A.4.1
DS31034A-page 34-8
Multi-master
Arbitration
The I
When two or more masters try to transfer data at the same time, arbitration and synchronization
occur.
Arbitration takes place on the SDA line, while the SCL line is high. The master which transmits a
high when the other master transmits a low loses arbitration
output stage. A master which lost arbitration can generate clock pulses until the end of the data
byte where it lost arbitration. When the master devices are addressing the same device, arbitra-
tion continues into the data.
Figure A-9:
Masters that also incorporate the slave function, and have lost arbitration must immediately
switch over to slave-receiver mode. This is because the winning master-transmitter may be
addressing it.
Arbitration is not allowed between:
• A repeated START condition
• A STOP condition and a data bit
• A repeated START condition and a STOP condition
Care needs to be taken to ensure that these conditions do not occur.
2
C protocol allows a system to have more than one master. This is called multi-master.
Multi-Master Arbitration (Two Masters)
DATA 2
SDA
SCL
DATA 1
transmitter 1 loses arbitration
DATA 1 SDA
(Figure
1997 Microchip Technology Inc.
A-9), and turns off its data
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