PIC16F818-E/SO Microchip Technology, PIC16F818-E/SO Datasheet - Page 99
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F818-E/SO
Manufacturer Part Number
PIC16F818-E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F818-E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F818-E/SO
Manufacturer:
Microchip Technology
Quantity:
135
12.10.1
External interrupt on the RB0/INT pin is edge triggered,
either rising if bit INTEDG (OPTION_REG<6>) is set,
or falling if the INTEDG bit is clear. When a valid edge
appears on the RB0/INT pin, flag bit, INTF
(INTCON<1>), is set. This interrupt can be disabled by
clearing enable bit, INTE (INTCON<4>). Flag bit INTF
must be cleared in software in the Interrupt Service
Routine before re-enabling this interrupt. The INT inter-
rupt can wake-up the processor from Sleep if bit INTE
was set prior to going into Sleep. The status of Global
Interrupt Enable bit, GIE, decides whether or not the
processor branches to the interrupt vector following
wake-up. See Section 12.13 “Power-Down Mode
(Sleep)” for details on Sleep mode.
12.10.2
An overflow (FFh
flag bit, TMR0IF (INTCON<2>). The interrupt can be
enabled/disabled
TMR0IE (INTCON<5>) (see Section 6.0 “Timer0
Module”).
EXAMPLE 12-1:
2004 Microchip Technology Inc.
MOVWF
SWAPF
CLRF
MOVWF
:
:(ISR)
:
SWAPF
MOVWF
SWAPF
SWAPF
INT INTERRUPT
TMR0 INTERRUPT
W_TEMP
STATUS, W
STATUS
STATUS_TEMP
STATUS_TEMP, W
STATUS
W_TEMP, F
W_TEMP, W
by
00h) in the TMR0 register will set
SAVING STATUS AND W REGISTERS IN RAM
setting/clearing
;Copy W to TEMP register
;Swap status to be saved into W
;bank 0, regardless of current bank, Clears IRP,RP1,RP0
;Save status to bank zero STATUS_TEMP register
;Insert user code here
;Swap STATUS_TEMP register into W
;(sets bank to original state)
;Move W into STATUS register
;Swap W_TEMP
;Swap W_TEMP into W
enable
bit,
12.10.3
An input change on PORTB<7:4> sets flag bit, RBIF
(INTCON<0>). The interrupt can be enabled/disabled
by setting/clearing enable bit, RBIE (INTCON<3>). See
Section 3.2 “EECON1 and EECON2 Registers”.
12.11 Context Saving During Interrupts
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key
registers during an interrupt (i.e., W, Status registers).
This will have to be implemented in software as shown
in Example 12-1.
For PIC16F818 devices, the upper 64 bytes of each
bank are common. Temporary holding registers,
W_TEMP and STATUS_TEMP, should be placed here.
These 64 locations do not require banking and
therefore, make it easier for context save and restore.
For PIC16F819 devices, the upper 16 bytes of each
bank are common.
PORTB INTCON CHANGE
PIC16F818/819
DS39598E-page 97