PIC16F785T-I/ML Microchip Technology, PIC16F785T-I/ML Datasheet - Page 70
PIC16F785T-I/ML
Manufacturer Part Number
PIC16F785T-I/ML
Description
3.5 KB Flash, 128 RAM, 18 I/O 20 QFN 4x4mm T/R
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F785-ISS.pdf
(206 pages)
3.PIC16F785-ISS.pdf
(10 pages)
4.PIC16F785-ISS.pdf
(28 pages)
Specifications of PIC16F785T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F785-ISS PDF datasheet #2
- PIC16F785-ISS PDF datasheet #3
- PIC16F785-ISS PDF datasheet #4
- Current page: 70 of 206
- Download datasheet (4Mb)
PIC16F785/HV785
9.1.2.2
Comparator C2 has one additional feature: its output
can be synchronized to the Timer1 clock input. Setting
C2SYNC of the CM2CON1 Register synchronizes the
output of Comparator 2 to the falling edge of the Timer1
clock input (see Figure 9-2 and Register 9-3).
The CM2CON1 register also contains mirror copies of
both comparator outputs, MC1OUT and MC2OUT of
the CM2CON1 Register. The ability to read both out-
puts simultaneously from a single register eliminates
the timing skew of reading separate registers.
REGISTER 9-3:
DS41249E-page 68
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note:
MC1OUT
R-0
Obtaining the status of C1OUT or C2OUT
by reading CM2CON1 does not affect the
comparator interrupt mismatch registers.
Control Register CM2CON1
MC1OUT: Mirror Copy of C1OUT bit (CM1CON0<6>)
MC2OUT: Mirror Copy of C2OUT bit (CM2CON0<6>)
Unimplemented: Read as ‘0’
T1GSS: Timer1 Gate Source Select bit
1 = Timer1 gate source is RA4/AN3/T1G/OSC2/CLKOUT
0 = Timer1 gate source is SYNCC2OUT.
C2SYNC: C2 Output Synchronous Mode bit
1 = C2 output is synchronous to falling edge of TMR1 clock
0 = C2 output is asynchronous
MC2OUT
R-0
CM2CON1: COMPARATOR C2 CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
U-0
—
© 2008 Microchip Technology Inc.
x = Bit is unknown
T1GSS
R/W-1
C2SYNC
R/W-0
bit 0
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