PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 4

• Manufacturer Part Number: PIC16F785-E/SS
• Description: 20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F785/HV785
2.0
2.1
The user memory space extends from 0x0000 to
0x1FFF, with addresses 0x0000-0x07FF implemented.
In Program/Verify mode, the program memory space
extends from 0x0000 to 0x3FFF, with the first half
(0x0000-0x1FFF) being user program memory and the
second half (0x2000-0x3FFF) being configuration
memory. The PC will increment from 0x0000-0x1FFF
and wrap to 0x0000. If the PC starts at 0x2000 it will
increment to 0x3FFF and wrap around to 0x2000 (not
to 0x0000). Once in configuration memory, the highest
bit of the PC stays a ‘1’, thus always pointing to the
configuration memory. The only way to point to user
program memory is to reset the part and re-enter
Program/Verify mode as described in Section 3.0
“Program/Verify Mode”.
In the configuration memory space, 0x2000-0x203F
are physically implemented. However, only locations
0x2000-0x2003 and 0x2007-0x2009 are available. The
other locations are reserved.
2.2
A user may store identification information (user ID) in
four designated locations. The user ID locations are
mapped in [0x2000-0x2003]. It is recommended that
the user use only the seven Least Significant bits (LSb)
of each user ID location. The user ID locations read out
normally, even after code protection is enabled. It is
recommended that user ID locations are written as
‘11 1111 1bbb bbbb’ where ‘bbb bbbb’ is user ID
information.
The 14 bits may be programmed, but only the 7 LSbs
are displayed by MPLAB
care” bits and are not read by MPLAB
DS41237D-page 4
MEMORY DESCRIPTION
Program Memory Map
User ID Locations
®
IDE. The 1111’s are “don’t
®
IDE.
2.3
The 8 MHz Internal Oscillator (INTOSC), the Power-on
Reset (POR), the Brown-out Reset (BOR) modules and
band gap voltage reference are factory calibrated.
These values are stored in Calibration Words at
addresses 0x2008 and 0x2009.
The Calibration Word locations are written at the time
of manufacturing and are not erased when a Bulk
Erase is performed. See Section 3.1.5.10 “Bulk
Erase Program Memory” for more information on the
various erase sequences. However, it is possible to
inadvertently write to these locations. The device may
not function properly or may operate outside of specifi-
cations if the Calibration Word locations do not contain
the correct value. Therefore, it is recommended that
the Calibration Words be read prior to any program-
ming procedure and verified after programming is com-
plete. See Figure 3-21 for a flowchart of the
recommended verification procedure.
The device should not be used if the verification of the
Calibration Word values fail after the device is
programmed. The 0x3FFF value is a special case, it is
a valid calibration value but, it is also the erased state
of the register.
Calibration Words
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