PIC16F777-I/ML Microchip Technology, PIC16F777-I/ML Datasheet - Page 145
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F777-I/ML
Manufacturer Part Number
PIC16F777-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F737-ISP.pdf
(276 pages)
4.PIC16F737-ISP.pdf
(10 pages)
Specifications of PIC16F777-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
I3DBF777 - BOARD DAUGHTER ICEPIC3
Eeprom Size
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F737-ISP PDF datasheet #3
- PIC16F737-ISP PDF datasheet #4
- Current page: 145 of 276
- Download datasheet (6Mb)
FIGURE 11-7:
FIGURE 11-8:
TABLE 11-9:
2004 Microchip Technology Inc.
0Bh, 8Bh,
10Bh,18Bh
0Ch
18h
1Ah
8Ch
98h
99h
Legend:
Note 1:
Address
Note:
RC7/RX/DT (pin)
Note:
RC7/RX/DT (pin)
Load RSR
Load RSR
Read
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN = 1.
x = unknown, — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Bits PSPIE and PSPIF are reserved on 28-pin devices; always maintain these bits clear.
Read
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN was not updated and still = 0.
RCIF
INTCON
PIR1
RCSTA
RCREG
PIE1
TXSTA
SPBRG
RCIF
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
AUSART Receive Register
Baud Rate Generator Register
PSPIF
PSPIE
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
SPEN
CSRC
Bit 7
GIE
Start
Start
bit
bit
(1)
(1)
bit 0
bit 0
PEIE
ADIF
ADIE
Bit 6
RX9
TX9
bit 8 = 1, Address Byte
bit 8 = 0, Data Byte
bit 1
bit 1
TMR0IE INT0IE
SREN
TXEN
RCIF
RCIE
Bit 5
bit 8
bit 8
CREN
SYNC
Bit 4
TXIF
TXIE
Stop
Stop
bit
bit
ADDEN
SSPIF
SSPIE
RBIE
Bit 3
Start
Start
—
bit
bit
bit 8 = 0, Data Byte
bit 8 = 1, Address Byte
bit 0
bit 0
TMR0IF
CCP1IE TMR2IE TMR1IE 0000 0000
CCP1IF TMR2IF TMR1IF
BRGH
FERR
Bit 2
INT0IF
OERR
TRMT
Bit 1
bit 8
bit 8
Stop
Stop
bit
bit
RX9D
TX9D
RBIF
Bit 0
Word 1
RCREG
Word 1
RCREG
PIC16F7X7
0000 000x
0000 0000
0000 000x
0000 0000
0000 -010
0000 0000
POR, BOR
Value on:
DS30498C-page 143
0000 000u
0000 0000
0000 000x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
all other
Resets
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