PIC16F737-E/SP Microchip Technology, PIC16F737-E/SP Datasheet - Page 109
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16F737-E/SP
Manufacturer Part Number
PIC16F737-E/SP
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F737-ISP.pdf
(276 pages)
4.PIC16F737-ISP.pdf
(10 pages)
Specifications of PIC16F737-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF777 - BOARD DAUGHTER ICEPIC3
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F737-ISP PDF datasheet #3
- PIC16F737-ISP PDF datasheet #4
- Current page: 109 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
Example 6-4: RAM Initialization
Bank0_LP
;
; Next Bank (Bank1)
; (** ONLY REQUIRED IF DEVICE HAS A BANK1 **)
;
Bank1_LP
;
; Next Bank (Bank2)
; (** ONLY REQUIRED IF DEVICE HAS A BANK2 **)
;
Bank2_LP
;
; Next Bank (Bank3)
; (** ONLY REQUIRED IF DEVICE HAS A BANK3 **)
;
Bank3_LP
:
CLRF
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
BSF
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
Section 6. Memory Organization
STATUS
0x20
FSR
INDF0
FSR
FSR, 7
Bank0_LP
0xA0
FSR
INDF0
FSR
STATUS, C
Bank1_LP
STATUS, IRP
0x20
FSR
INDF0
FSR
FSR, 7
Bank2_LP
0xA0
FSR
INDF0
FSR
STATUS, C
Bank3_LP
; Clear STATUS register (Bank0)
; 1st address (in bank) of GPR area
; Move it to Indirect address register
; Clear GPR at address pointed to by FSR
; Next GPR (RAM) address
; End of current bank ? (FSR = 80h, C = 0)
; NO, clear next location
; 1st address (in bank) of GPR area
; Move it to Indirect address register
; Clear GPR at address pointed to by FSR
; Next GPR (RAM) address
; End of current bank? (FSR = 00h, C = 1)
; NO, clear next location
; Select Bank2 and Bank3
;
; 1st address (in bank) of GPR area
; Move it to Indirect address register
; Clear GPR at address pointed to by FSR
; Next GPR (RAM) address
; End of current bank? (FSR = 80h, C = 0)
; NO, clear next location
; 1st address (in bank) of GPR area
; Move it to Indirect address register
; Clear GPR at address pointed to by FSR
; Next GPR (RAM) address
; End of current bank? (FSR = 00h, C = 1)
; NO, clear next location
; YES, All GPRs (RAM) is cleared
for Indirect addressing
DS31006A-page 6-15
6
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