PIC16F676-E/SL Microchip Technology, PIC16F676-E/SL Datasheet - Page 26

• Manufacturer Part Number: PIC16F676-E/SL
• Description: 14 PIN, 1.75KB STD FLASH, 64 RAM, 12 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F676-E/SL

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16F630/676
3.2.3.5
Figure 3-4 shows the diagram for this pin. The RA4 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D (PIC16F676 only)
• a TMR1 gate input
• a crystal/resonator connection
• a clock output
FIGURE 3-4:
DS40039F-page 26
PORTA
PORTA
WPUA
WPUA
Data Bus
TRISA
TRISA
Interrupt-on-Change
IOCA
IOCA
Note 1: CLK modes are XT, HS, LP, LPTMR1 and CLKOUT
WR
WR
WR
WR
RD
RD
RD
RD
2: With CLKOUT option.
Enable.
D
D
D
D
To TMR1 T1G
To A/D Converter
CK
CK
CK
CK
RA4/AN3/T1G/OSC2/CLKOUT
Q
Q
Q
Q
Q
Q
Q
Q
Input Mode
BLOCK DIAGRAM OF RA4
Analog
F
OSC1
OSC
INTOSC/
RC/EC
CLKOUT
CLKOUT
Enable
Enable
Input Mode
/4
RAPU
RD PORTA
CLKOUT
Analog
Enable
Oscillator
(2)
Modes
Q
Q
1
0
CLK
Circuit
EN
EN
(1)
D
D
V
DD
Weak
V
V
DD
SS
I/O pin
3.2.3.6
Figure 3-5 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a TMR1 clock input
• a crystal/resonator connection
• a clock input
FIGURE 3-5:
PORTA
PORTA
WPUA
WPUA
Data Bus
TRISA
TRISA
IOCA
IOCA
Interrupt-on-Change
WR
WR
WR
WR
RD
RD
RD
RD
Note
D
D
D
D
To TMR1 or CLKGEN
CK
CK
CK
CK
1: Timer1 LP Oscillator enabled.
2: When using Timer1 with LP oscillator, the Schmitt
RA5/T1CKI/OSC1/CLKIN
Trigger is by-passed.
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA5
INTOSC
 2010 Microchip Technology Inc.
Mode
OSC2
INTOSC
RAPU
RD PORTA
Mode
Oscillator
TMR1LPEN
Q
Q
Circuit
EN
EN
D
D
V
(1)
DD
Weak
V
V
DD
SS
I/O pin
(1)