PIC16F636T-I/ML Microchip Technology, PIC16F636T-I/ML Datasheet - Page 25
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F636T-I/ML
Manufacturer Part Number
PIC16F636T-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC12F635-ISN.pdf
(234 pages)
3.PIC16F636-ISL.pdf
(8 pages)
4.PIC16F636-ISL.pdf
(4 pages)
Specifications of PIC16F636T-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232, SPI, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162057 - MPLAB ICD 2 HEADER 14DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC12F635-ISN PDF datasheet #2
- PIC16F636-ISL PDF datasheet #3
- PIC16F636-ISL PDF datasheet #4
- Current page: 25 of 234
- Download datasheet (4Mb)
TABLE 2-3:
© 2007 Microchip Technology Inc.
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1:
Addr
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTC
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
WDTCON
CMCON0 C2OUT
CMCON1
2:
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
MCLR and WDT Reset do not affect the previous value data latch. The RAIF bit will be cleared upon Reset but will set
again if the mismatch exists.
Addressing this location uses contents of FSR to address data memory
(not a physical register)
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1
Holding Register for the Most Significant Byte of the 16-bit TMR1
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
EEIF
PIC16F636/639 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Bit 7
IRP
GIE
—
—
—
—
—
C1OUT
LVDIF
PEIE
Bit 6
RP1
—
—
—
—
—
C2INV
CRIF
Bit 5
T0IE
RP0
RA5
RC5
—
—
—
Write Buffer for upper 5 bits of Program Counter
WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN ---0 1000
C1INV
INTE
Bit 4
C2IF
RA4
RC4
TO
—
PIC12F635/PIC16F636/639
RAIE
Bit 3
C1IF
RC3
RA3
CIS
PD
—
OSFIF
Bit 2
CM2
RA2
RC2
T0IF
—
Z
TMR1CS TMR1ON 0000 0000
T1GSS
INTF
Bit 1
CM1
RA1
RC1
DC
—
C2SYNC ---- --10
TMR1IF 0000 00-0
RAIF
Bit 0
CM0
RA0
RC0
C
(2)
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--xx xx00
--xx xx00
---0 0000
0000 000x
xxxx xxxx
xxxx xxxx
0000 0000
POR/BOR/
Value on
WUR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DS41232D-page 23
144,137
32,137
61,137
32,137
26,137
32,137
48,137
57,137
32,137
28,137
30,137
64,137
64,137
68,137
79,137
82,137
Page
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