PIC16F631T-I/SS Microchip Technology, PIC16F631T-I/SS Datasheet - Page 302
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PIC16F631T-I/SS
Manufacturer Part Number
PIC16F631T-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
Specifications of PIC16F631T-I/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
658-1047-5 - BOARD EVALUATION ACCESSTOUCHXLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F631T-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F631/677/685/687/689/690
Timing Diagrams
Timing Parameter Symbology........................................... 240
Timing Requirements
TRISA
DS41262E-page 300
A/D Conversion ......................................................... 256
A/D Conversion (Sleep Mode) .................................. 257
Asynchronous Reception .......................................... 158
Asynchronous Transmission ..................................... 154
Asynchronous Transmission (Back to Back) ............ 154
Auto Wake-up Bit (WUE) During Normal Operation . 168
Auto Wake-up Bit (WUE) During Sleep .................... 169
Automatic Baud Rate Calibration .............................. 167
Brown-out Reset (BOR) ............................................ 244
Brown-out Reset Situations ...................................... 202
CLKOUT and I/O....................................................... 243
Clock Synchronization .............................................. 196
Clock Timing ............................................................. 241
Comparator Output ..................................................... 93
Enhanced Capture/Compare/PWM (ECCP) ............. 247
EUSART Synchronous Receive (Master/Slave) ....... 249
EUSART Synchronous Transmission
Fail-Safe Clock Monitor (FSCM) ................................. 58
Full-Bridge PWM Output ........................................... 138
Half-Bridge PWM Output .................................. 136, 144
I
I
I
I
I
I
INT Pin Interrupt........................................................ 210
Internal Oscillator Switch Timing................................. 54
PWM Auto-shutdown
PWM Direction Change ............................................ 139
PWM Direction Change at Near 100% Duty Cycle ... 140
PWM Output (Active-High)........................................ 134
PWM Output (Active-Low) ........................................ 135
Reset, WDT, OST and Power-up Timer ................... 244
Send Break Character Sequence ............................. 170
Slave Synchronization .............................................. 185
SPI Master Mode (CKE = 1, SMP = 1) ..................... 250
SPI Mode (Master Mode) .......................................... 184
SPI Mode (Slave Mode with CKE = 0) ...................... 186
SPI Mode (Slave Mode with CKE = 1) ...................... 186
SPI Slave Mode (CKE = 0) ....................................... 251
SPI Slave Mode (CKE = 1) ....................................... 251
Synchronous Reception (Master Mode, SREN) ....... 174
Synchronous Transmission....................................... 172
Synchronous Transmission (Through TXEN) ........... 172
Time-out Sequence
Timer0 and Timer1 External Clock ........................... 246
Timer1 Incrementing Edge.......................................... 87
Two Speed Start-up .................................................... 56
Wake-up from Interrupt ............................................. 215
I
I2C Bus Start/Stop Bits ............................................. 253
SPI Mode .................................................................. 252
2
2
2
2
2
2
2
C Bus Data ............................................................. 253
C Bus Start/Stop Bits.............................................. 252
C Reception (7-bit Address) ................................... 190
C Slave Mode (Transmission, 10-bit Address) ....... 194
C Slave Mode with SEN = 0 (Reception, 10-bit Ad-
C Transmission (7-bit Address) .............................. 193
C Bus Data ............................................................. 254
T2CON................................................................ 92
(Master/Slave)................................................... 249
dress) ................................................................ 192
Auto-restart Enabled ......................................... 143
Firmware Restart .............................................. 143
Case 1............................................................... 204
Case 2............................................................... 204
Case 3............................................................... 204
TRISA Register................................................................... 59
TRISB
TRISB Register................................................................... 70
TRISC
TRISC Register................................................................... 76
Two-Speed Clock Start-up Mode........................................ 55
TXREG ............................................................................. 153
TXSTA Register................................................................ 160
U
UA..................................................................................... 180
Ultra Low-Power Wake-up.............. 14, 16, 18, 20, 22, 60, 63
Update Address bit, UA .................................................... 180
V
Voltage Reference (VR)
Voltage Reference. See Comparator Voltage
Voltage References
V
W
Wake-up on Break ............................................................ 168
Wake-up Using Interrupts ................................................. 214
Watchdog Timer (WDT).................................................... 212
WCOL bit .......................................................................... 181
WDTCON Register ........................................................... 213
WPUA Register................................................................... 62
WPUB Register................................................................... 70
Write Collision Detect bit (WCOL) .................................... 181
WWW Address ................................................................. 301
WWW, On-Line Support ....................................................... 8
REF
Registers .................................................................... 59
Registers .................................................................... 69
Registers .................................................................... 76
BRGH Bit .................................................................. 163
Specifications ........................................................... 248
Reference (CV
Associated registers ................................................. 106
VP6 Stabilization ...................................................... 105
Associated registers ................................................. 213
Clock Source ............................................................ 212
Modes ....................................................................... 212
Period ....................................................................... 212
Specifications ........................................................... 245
. S
EE
ADC Reference Voltage
REF
)
© 2008 Microchip Technology Inc.