PIC16F627-20/SO Microchip Technology, PIC16F627-20/SO Datasheet - Page 18
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F627-20/SO
Manufacturer Part Number
PIC16F627-20/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,18PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16F627-20/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F627-20/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 18 of 170
- Download datasheet (5Mb)
PIC16F62X
TABLE 3-2:
DS40300C-page 16
Bank 1
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend:
Note 1: For the Initialization Condition for Registers Tables, refer to Table 14-7 and Table 14-8 on page 98.
Address
— = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unim-
plemented
INDF
OPTION
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
PIE1
PCON
PR2
TXSTA
SPBRG
EEDATA
EEADR
EECON1
EECON2
VRCON
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Addressing this location uses contents of FSR to address data memory (not a physical
register)
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Timer2 Period Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Baud Rate Generator Register
EEPROM data register
EEPROM control register 2 (not a physical register)
Unimplemented
TRISA7
TRISB7
Bit 7
CSRC
RBPU
VREN
EEIE
IRP
GIE
—
—
—
—
EEPROM address register
INTEDG
TRISA6
TRISB6
Bit 6
VROE
CMIE
PEIE
RP1
TX9
—
—
—
TRISA5
TRISB5
Bit 5
T0CS
TXEN
RCIE
T0IE
VRR
RP0
—
—
—
Preliminary
Write buffer for upper 5 bits of program counter
TRISA4
TRISB4
Bit 4
SYNC
T0SE
INTE
TXIE
TO
—
—
—
WRERR
TRISA3
TRISB3
Bit 3
OSCF
RBIE
PSA
VR3
PD
—
—
TRISA2
TRISB2
CCP1IE
WREN
Bit 2
BRGH
T0IF
VR2
PS2
—
Z
TMR2IE
TRISA1
TRISB1
Bit 1
TRMT
INTF
POR
PS1
VR1
WR
DC
TMR1IE
TRISA0
TRISB0
2003 Microchip Technology Inc.
Bit 0
TX9D
RBIF
BOD
VR0
PS0
RD
C
xxxx xxxx
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
1111 1111
1111 1111
---0 0000
0000 000x
0000 -000
---- 1-0x
1111 1111
0000 -010
0000 0000
xxxx xxxx
xxxx xxxx
---- x000
000- 0000
Value on
Reset
--------
POR
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
Details on
Page
25
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25
19
25
29
34
25
21
22
24
50
69
69
87
87
87
87
59
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