PIC16C72-04I/SP Microchip Technology, PIC16C72-04I/SP Datasheet - Page 156
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16C72-04I/SP
Manufacturer Part Number
PIC16C72-04I/SP
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C72-04SO.pdf
(125 pages)
5.PIC16C72-04SO.pdf
(8 pages)
Specifications of PIC16C72-04I/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16C72-04SO PDF datasheet #4
- PIC16C72-04SO PDF datasheet #5
- Current page: 156 of 289
- Download datasheet (3Mb)
PIC16C7X
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
DS30390E-page 156
Inclusive OR W with f
[ label ]
0
d
(W) .OR. (f)
Z
Inclusive OR the W register with regis-
ter 'f'. If 'd' is 0 the result is placed in the
W register. If 'd' is 1 the result is placed
back in register 'f'.
1
1
Before Instruction
After Instruction
Move f
[ label ]
0
d
(f)
Z
The contents of register f is moved to a
destination dependant upon the status
of d. If d = 0, destination is W register. If
d = 1, the destination is file register f
itself. d = 1 is useful to test a file regis-
ter since status flag Z is affected.
1
1
After Instruction
Decode
IORWF
Decode
MOVF
Q1
Q1
00
00
f
f
[0,1]
[0,1]
(destination)
127
127
RESULT =
W
RESULT =
W
Z
W = value in FSR register
Z = 1
IORWF
MOVF f,d
register
register
0100
1000
FSR, 0
Read
Read
Q2
Q2
'f'
'f'
(destination)
RESULT, 0
=
=
=
Process
Process
dfff
dfff
f,d
data
data
Q3
Q3
0x13
0x91
0x13
0x93
1
destination
destination
ffff
ffff
Write to
Write to
Q4
Q4
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
Move Literal to W
[ label ]
0
k
The eight bit literal 'k' is loaded into W
register
as 0’s.
1
1
After Instruction
Move W to f
[ label ]
0
(W)
Move data from W register to register
'f'
1
1
Before Instruction
After Instruction
None
None
.
MOVLW
MOVWF
Decode
Decode
Q1
Q1
11
00
k
f
(W)
.
1997 Microchip Technology Inc.
127
(f)
255
The don’t cares will assemble
W
OPTION =
W
OPTION =
W
MOVLW k
MOVWF
literal 'k'
register
00xx
0000
0x5A
Read
Read
OPTION_REG
Q2
Q2
'f'
=
0x5A
=
=
kkkk
Process
1fff
Process
data
data
Q3
Q3
f
0xFF
0x4F
0x4F
0x4F
register 'f'
Write to
kkkk
ffff
Write
Q4
Q4
W
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