PIC16C505-20/SL Microchip Technology, PIC16C505-20/SL Datasheet - Page 19

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PIC16C505-20/SL

Manufacturer Part Number
PIC16C505-20/SL
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,14PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C505-20/SL

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Ram Size
72 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
72 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
11
Number Of Timers
1
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1086 - ADAPTER 14-ZIF BD W/14-SO PLUGS309-1085 - ADAPTER 14-DIP BD W/2 14-SO PLUG309-1001 - ADAPTER 14-SOIC TO 14-DIP309-1000 - ADAPTER 14-SOIC TO 14-DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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5.0
As with any other register, the I/O register can be
written and read under program control. However,
read instructions (e.g., MOVF PORTB,W) always read
the I/O pins independent of the pin’s input/output
modes. On RESET, all I/O ports are defined as input
(inputs are at hi-impedance) since the I/O control
registers are all set.
5.1
PORTB is an 8-bit I/O register. Only the low order 6
bits are used (RB<5:0>). Bits 7 and 6 are
unimplemented and read as '0's. Please note that RB3
is an input only pin. The configuration word can set
several I/O’s to alternate functions. When acting as
alternate functions, the pins will read as ‘0’ during port
read. Pins RB0, RB1, RB3 and RB4 can be configured
with weak pull-ups and also with wake-up on change.
The wake-up on change and weak pull-up functions
are not pin selectable. If pin 4 is configured as MCLR,
weak pull-up is always off and wake-up on change for
this pin is not enabled.
5.2
PORTC is an 8-bit I/O register. Only the low order 6 bits
are used (RC<5:0>). Bits 7 and 6 are unimplemented
and read as ‘0’s.
5.3
The output driver control register is loaded with the
contents of the W register by executing the TRIS f
instruction. A '1' from a TRIS register bit puts the
corresponding output driver in a hi-impedance mode.
A '0' puts the contents of the output data latch on the
selected pins, enabling the output buffer. The
exceptions are RB3, which is input only, and RC5,
which may be controlled by the option register. See
Register 4-2.
The TRIS registers are “write-only” and are set (output
drivers disabled) upon RESET.
Note:
1999 Microchip Technology Inc.
I/O PORT
PORTB
PORTC
TRIS Registers
A read of the ports reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high,
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
5.4
The equivalent circuit for an I/O port pin is shown in
Figure 5-1. All port pins except RB3, which is input
only, may be used for both input and output operations.
For input operations, these ports are non-latching. Any
input must be present until read by an input instruction
(e.g., MOVF PORTB,W). The outputs are latched and
remain unchanged until the output latch is rewritten. To
use a port pin as output, the corresponding direction
control bit in TRIS must be cleared (= 0). For use as an
input, the corresponding TRIS bit must be set. Any I/O
pin (except RB3) can be programmed individually as
input or output.
FIGURE 5-1:
Data
Bus
WR
Port
W
Reg
TRIS ‘f’
Note 1:
Note 2:
I/O Interfacing
I/O pins have protection diodes to V
See Table 3-1 for buffer type.
D
D
CK
Reset
CK
Data
Latch
TRIS
Latch
EQUIVALENT CIRCUIT
FOR A SINGLE I/O PIN
Q
Q
Q
Q
PIC16C505
RD Port
(2)
DS40192C-page 19
V
V
P
N
SS
DD
DD
and V
I/O
pin
SS
(1)
.

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