PIC12C672-10/P Microchip Technology, PIC12C672-10/P Datasheet - Page 4

• Manufacturer Part Number: PIC12C672-10/P
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,8PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/P

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC12C67X
Clarifications/Corrections to the Data Sheet:
In the Device Data Sheet (DS30561B), the following
clarifications and corrections should be noted.
1.
In Section 4.0, corrections for the Special Function
Register Summary, Table 4-1, are shown.
TABLE 4-1:
DS80067C-page 4
8Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as ’0’.
Note 1: These registers can be addressed from either bank.
Address
Bank 1
Module:
2: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose con-
3: Other (non Power-up) Resets include external RESET through MCLR and Watchdog Timer Reset.
4: The IRP and RP1 bits are reserved on the PIC12C67X; always maintain these bits clear.
5: The SCL (GP7) and SDA (GP6) bits are unimplemented on the PIC12C671/672 and read as ’0’.
OSCCAL
Shaded locations are unimplemented, read as ‘0’.
tents are transferred to the upper byte of the program counter.
Name
Register Summary (OSCCAL)
PIC12C67X SPECIAL FUNCTION REGISTER SUMMARY
CAL5
Bit 7
CAL4
Bit 6
CAL3
Bit 5
CAL2
Bit 4
CAL1
Bit 3
CAL0
Bit 2
Bit 1
—
2001 Microchip Technology Inc.
Bit 0
—
1000 00--
Power-on
Value on
Reset
uuuu uu--
RESETS
Value on
all other
(3)