PIC12C672-04E/P Microchip Technology, PIC12C672-04E/P Datasheet - Page 43
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PIC12C672-04E/P
Manufacturer Part Number
PIC12C672-04E/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672-04E/P
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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- Download datasheet (3Mb)
2.5
1997 Microchip Technology Inc.
Internal 4 MHz RC Oscillator
bit 7:4
bit 3
bit 2
bit 1:0
The internal RC oscillator (not on all devices) provides a fixed 4 MHz (nominal) system clock at
V
on variation over voltage and temperature.
The value in the OSCCAL register is used to tune the frequency of the internal RC oscillator. The
calibration value that Microchip programs into the device will “trim” the internal oscillator to
remove process variation from the oscillator frequency. The CAL3:CAL0 bits are used for fine cal-
ibration within a frequency window. Higher values of CAL3:CAL0 (from 0000 to 1111) yields
higher clock speeds.
When a 4 MHz internal RC oscillator frequency cannot be achieved by a CAL3:CAL0 value, the
RC oscillator frequency can be increased or decreased by an offset frequency. The CALFST and
CALSLW bits are used to enable a positive or negative frequency offset to place the internal RC
frequency within the CAL3:CAL0 trim window.
Setting the CALFST bit offsets the internal RC for a higher frequency, while setting the CALSLW
bit offsets the internal RC for a lower frequency.
Upon a device reset, the OSCCAL register is forced to the midpoint value (CAL3:CAL0 = 7h,
CALFST and CALSLW providing no offset).
Register 2-1: OSCCAL Register
CAL3:CAL0: Internal RC Oscillator Calibration bits
0000 = Lowest clock frequency within the trim range
1111 = Highest clock frequency within the trim range
CALFST: Oscillator Range Offset bit
1 = Increases the frequency of the internal RC oscillator into the CAL3:CAL0 trim window
0 = No offset provided
CALSLW: Oscillator Range Offset bit
1 = Decreases the frequency of the internal RC oscillator into the CAL3:CAL0 trim window
0 = No offset provided
Unimplemented: Read as '0'
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
bit 7
•
•
•
DD
Note:
Note:
Note:
R/W-0
CAL3
= 5V and 25 C, see the device data sheet’s “Electrical Specifications” section for information
When both bits are set, the CALFST bit overrides the CALSLW bit.
These bits should be written as ‘0’ when modifying the OSCCAL register, for com-
patibility with future devices.
OSCCAL is used to remove process variation from the internal RC oscillator of the
device. The OSCCAL value should not be modified from the Microchip supplied
value, and all timing critical functions should be adjusted by the application software.
R/W-1
CAL2
W = Writable bit
R/W-1
CAL1
R/W-1
CAL0
Section 2. Oscillator
- n = Value at POR reset
CALFST
R/W-0
CALSLW
R/W-0
DS31002A-page 2-13
U-0
—
bit 0
U-0
—
2
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