MGA-72543-TR1 Avago Technologies US Inc., MGA-72543-TR1 Datasheet - Page 15

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MGA-72543-TR1

Manufacturer Part Number
MGA-72543-TR1
Description
IC,Microwave/Millimeter Wave Amplifier,GAAS,SOT-343R,PLASTIC
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of MGA-72543-TR1

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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• Adaptive Biasing
For applications in which input power levels vary over a
wide range, it may be useful to dynamically adapt the bias
of the MGA-72543 to match the signal level. This involves
sensing the signal level at some point in the system and
automatically adjusting the bias current of the ampli fier
accordingly. The advantage of adaptive biasing is con-
servation of supply current (longer battery life) by using
only the amount of current necessary to handle the input
signal without distortion.
Adaptive biasing of the MGA-72543 can be accomplished
by either analog or digital means. For the analog control
case, an active current source (discrete device or IC) is
used in lieu of the source bias resistor. For simple digital
control, electronic switches can be used to control the
value of the source resistor in discrete increments. Both
methods of adaptive biasing are depicted in Figure 6.
Figure 6. Adaptive Bias Control.
• Applying the Device Voltage
Common to all methods of biasing, voltage Vd is applied
to the MGA-72543 through the RF Output connection (Pin
2). A RF choke is used to isolate the RF signal from the DC
supply. The bias line is capacitively bypassed to keep RF
from the DC supply lines and prevent resonant dips or
peaks in the response of the amplifier. Where practical, it
may be cost effective to use a length of high impedance
transmission line (preferably λ/4) in place of the RFC.
When using the gate bias method, the overall device
voltage is equal to the sum of Vref at Pin 3 and voltage Vd
at Pin 2. As an example, to bias the device at the typical
operating voltage of 3 volts, Vd would be set to 2.5 volts
for a Vref of -0.5 volts. Figure 7 shows a DC schematic of
a gate bias circuit.
Just as for the gate bias method, the overall device voltage
for source resistor biasing is equal to Vref + Vd. Since Vref
is zero when using a source resistor, Vd is the same as the
device operating voltage, typically 3 volts. A source resis-
tor bias circuit is shown in Figure 8.
15
(a) Analog
3
1
4
2
Control
Analog
(b) Digital
3
1
4
2
A DC blocking capacitor at the output of the RFIC iso-
lates the supply voltage from succeeding circuits. If the
source resistor method of biasing is used, the RF input
terminal of the MGA-72543 is at DC ground potential
and a blocking capacitor is not required unless the input
is connected directly to a preceding stage that has a DC
voltage present.
• Biasing for Higher Linearity or Output Power
While the MGA-72543 is designed primarily for use up
to 50 mA in +3 volt applications, the output power can
be increased by using higher currents and/or higher
supply voltages. If higher bias levels are used, appropriate
caution should be observed for both the thermal limits
and the Absolute Maximum Ratings.
As a guideline for operation at higher bias levels, the
Maximum Operating conditions shown in the data sheet
table of Absolute Maximum Ratings should be followed.
This set of conditions is the maximum combination of
bias voltage, bias current, and device temperature that is
recommended for reliable operation. Note: In contrast to
Absolute Maximum ratings, in which exceeding any one
parameter may result in damage to the device, all of the
Maximum Operating conditions may reliably be applied
to the MGA-72543 simultaneously.
Control
Digital
Input
Figure 7. DC Schematic for Gate Bias.
Input
Figure 8. DC Schematic of Source Resistor Biasing.
RF
RF
Vref = -0.5 V
3
1
3
1
72
72
4
4
2
2
R
bias
RFC
RFC
V
d
V
Output
= +2.5 V
d
Output
RF
= +3 V
RF

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