LTC4413EDD Linear Technology, LTC4413EDD Datasheet - Page 6

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LTC4413EDD

Manufacturer Part Number
LTC4413EDD
Description
IC,Power Control/Management,CMOS,LLCC,10PIN,PLASTIC
Manufacturer
Linear Technology
Datasheets

Specifications of LTC4413EDD

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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PI FU CTIO S
LTC4413
INA (Pin 1): Primary Ideal Diode Anode and Positive
Power Supply. Bypass INA with a ceramic capacitor of at
least 1µF. 1Ω snub resistors in series with a capacitor and
higher valued capacitances are recommended when large
inductances are in series with this input. Limit slew rate on
this pin to less than 0.5V/µs. This pin can be grounded
when not used.
ENBA (Pin 2): Enable Low for Diode A. Weak (3µA) pull-
down. Pull this pin high to shut down this power path. Tie
to GND to enable. Refer to Table 1 for mode control
functionality. This pin can be left floating, weak pull-down
internal to the LTC4413.
GND (Pins 3, 11): Power and Signal Ground for the IC. The
Exposed Pad of the package, Pin 11, must be soldered to
PCB ground to provide both electrical contact to ground
and good thermal contact to the PCB.
ENBB (Pin 4): Enable Low for Diode B. Weak (3µA) pull-
down. Pull this pin high to shut down this power path. Tie
to GND to enable. Refer to Table 1 for mode control
functionality. This pin can be left floating, weak pull-down
internal to the LTC4413.
INB (Pin 5): Secondary Ideal Diode Anode and Positive
Power Supply. Bypass INB with a ceramic capacitor of at
least 1µF. 1Ω snub resistors in series with a capacitor and
higher valued capacitances are recommended when large
inductances are in series with this input. Limit slew rate on
this pin to less than 0.5V/µs. This pin can be grounded
when not used.
6
U
U
U
OUTB (Pin 6): Secondary Ideal Diode Cathode and Output.
Bypass OUTB with a high (1mΩ min) ESR ceramic capaci-
tor of at least 4.7µF. Limit slew rate on this pin to less than
0.5V/µs. This pin must be left floating when not in use.
NC (Pin 7): No Internal Connection.
NC (Pin 8): No Internal Connection.
STAT (Pin 9): Status Condition Indicator. Weak (9µA) pull-
down current output. When terminated, STAT = High
indicates diode conducting.
The function of the STAT pin depends on the mode that has
been selected. Table 2 describes the STAT pin output
current as a function of the mode selected as well as the
conduction state of the two diodes. This pin can also be left
floating or grounded.
OUTA (Pin 10): Primary Ideal Diode Cathode and Output.
Bypass OUTA with a high (1mΩ min) ESR ceramic capaci-
tor of at least 4.7µF. Limit slew rate on this pin to less than
0.5V/µs. This pin must be left floating when not in use.
4413fa

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