LM95235CIMM National Semiconductor, LM95235CIMM Datasheet - Page 17

• Manufacturer Part Number: LM95235CIMM
• Description: IC,TEMPERATURE SENSOR,TSSOP,8PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LM95235CIMM

• Rohs Compliant: NO

2.0 LM95235 Registers
For data synchronization purposes, the MSB register should be read first if the user wants to read both MSB and LSB registers.
The LSB will be locked after the MSB is read. The LSB will be unlocked after being read. If the user reads MSBs consecutively,
each time the MSB is read, the LSB associated with that temperature will be locked in and override the previous LSB value
locked-in.
2.2 DIODE CONFIGURATION REGISTERS
Power up default is 1Fh.
Power up default is 00h.
Power up default is 00h. LSb = 0.125 ˚C.
(Read/write Address BFh):
D7
0
Bits
2-1
7
6
5
4
3
0
OS/A0 Function Select
Name
Reserved
OS/A0 Function Select
Diode Fault Mask for OS
Diode Fault Mask for T_CRIT
Remote Diode TruTherm
Mode Select
Remote Filter Enable
Reserved
D6
(R/W Address 11h) 10-bit plus sign format:
(R/W Address 12h) 10-bit plus sign format:
Value
Value
BIT
BIT
SIGN
0.50
D7
D7
Remote Offset High Byte (2’s Complement)
(Continued)
Remote Offset Low Byte (2’s Complement)
OS Fault Mask
0.25
D6
D6
64
D5
Configuration Register 2
Description
Reports "0" when read.
0: Address (A0) function is enabled
1: Over-temperature Shutdown (OS) is enabled
0: Off
1: On
0: Off
1: On
0: Selects Diode Model 2, MMBT3904, with TruTherm technology
disabled.
1: Selects Diode Model 1, A typical Intel Processor, with 65 nm or
90 nm technology, and TruTherm technology enabled.
00: Filter Disable
01: Reserved
10: Reserved
11: Filter Enable
Reports "1" when read.
0.125
D5
D5
32
T_CRIT
17
D4
D4
16
Mask
0
D4
D3
D3
8
0
TruTherm Select
D2
D2
4
0
D3
D1
D1
2
0
D0
D0
1
0
RFE1
D2
RFE0
D1
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D0
1