LM75BIMX-3 National Semiconductor, LM75BIMX-3 Datasheet - Page 11
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LM75BIMX-3
Manufacturer Part Number
LM75BIMX-3
Description
IC,TEMPERATURE SENSOR,SOP,8PIN,PLASTIC
Manufacturer
National Semiconductor
Datasheet
1.LM75BIMX-3.pdf
(18 pages)
Specifications of LM75BIMX-3
Rohs Compliant
NO
Temperature Sensor Function
Temp Sensor
Interface Type
Serial (2-Wire)
Output Type
Digital
Resolution
9b
Package Type
SOIC N
Operating Temperature (min)
-55
Operating Temperature (max)
125C
Operating Temperature Classification
Military
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM75BIMX-3
Manufacturer:
NSC
Quantity:
20 000
Company:
Part Number:
LM75BIMX-3/NOPB
Manufacturer:
NS/TI
Quantity:
2 700
Part Number:
LM75BIMX-3/NOPB
Manufacturer:
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Quantity:
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1.9 O.S. POLARITY
The O.S. output can be programmed via the configuration
register to be either active low (default mode), or active high.
In active low mode the O.S. output goes low when triggered
1.10 INTERNAL REGISTER STRUCTURE
There are four data registers in the LM75B and LM75C se-
lected by the Pointer register. At power-up the Pointer is set
to “000”; the location for the Temperature Register. The Point-
er register latches whatever the last location it was set to. In
Interrupt Mode, a read from the LM75, or placing the device
in shutdown mode, resets the O.S. output. All registers are
read and write, except the Temperature register which is a
read only.
A write to the LM75 will always include the address byte and
the Pointer byte. A write to the Configuration register requires
one data byte, and the T
data bytes.
Reading the LM75 can take place either of two ways: If the
location latched in the Pointer is correct (most of the time it is
expected that the Pointer will point to the Temperature regis-
ter because it will be the data most frequently read from the
LM75), then the read can simply consist of an address byte,
followed by retrieving the corresponding number of data
bytes. If the Pointer needs to be set, then an address byte,
FIGURE 5. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero (“0”)
OS
and T
HYST
registers require two
11
exactly as shown on the O.S. Output Temperature Response
Diagram,
the O.S. output.
pointer byte, repeat start, and another address byte will ac-
complish a read.
The first data byte is the most significant byte with most sig-
nificant bit first, permitting only as much data as necessary to
be read to determine temperature condition. For instance, if
the first four bits of the temperature data indicates an overtem-
perature condition, the host processor could immediately take
action to remedy the excessive temperatures. At the end of a
read, the LM75 can accept either Acknowledge or No Ac-
knowledge from the Master (No Acknowledge is typically
used as a signal for the slave that the Master has read its last
byte).
An inadvertent 8-bit read from a 16-bit register, with the D7
bit low, can cause the LM75 to stop in a state where the SDA
line is held low as shown in
further bus communication until at least 9 additional clock cy-
cles have occurred. Alternatively, the master can issue clock
cycles until SDA goes high, at which time issuing a “Stop”
condition will reset the LM75.
Figure
4. Active high simply inverts the polarity of
30099808
Figure
5. This can prevent any
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30099809