LM63CIMAX National Semiconductor, LM63CIMAX Datasheet - Page 2

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LM63CIMAX

Manufacturer Part Number
LM63CIMAX
Description
IC,Motor Controller,MOS,SOP,8PIN
Manufacturer
National Semiconductor
Datasheet

Specifications of LM63CIMAX

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Pin
Pin Descriptions
Simplified Block Diagram
1
2
3
4
5
6
7
8
ALERT/TACH
SMBDAT
SMBCLK
Name
PWM
GND
V
D+
D−
DD
Power Supply Input
Open-Drain Output
Digital Output
Input/Output
Analog Input
Analog Input
Digital Input/
Digital Input
Open-Drain
Digital I/O
Ground
Connect to a low-noise +3.3
with a 0.1 µF ceramic capacitor in parallel with a 100 pF ceramic capacitor.
A bulk capacitance of 10 µF needs to be in the vicinity of the LM63’s V
pin.
Connect to the anode (positive side) of the remote diode. A 2.2 nF ceramic
capacitor must be connected between pins 2 and 3.
Connect to the cathode (negative side) of the remote diode. A 2.2 nF
ceramic capacitor must be connected between pins 2 and 3.
Open-Drain Digital Output. Connect to fan drive circuitry. The power-on
default for this pin is low (pin 4 pulled to ground).
This is the analog and digital ground return.
Depending on how the LM63 is programmed, this pin is either an
open-drain ALERT output or a tachometer input for measuring fan speed.
The power-on default for this pin is the ALERT function.
This is the bi-directional SMBus data line.
Digital Input. This is the SMBus clock input.
2
Function and Connection
±
0.3 VDC power supply, and bypass to GND
20057002
DD

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