LM4936MH National Semiconductor, LM4936MH Datasheet - Page 18

• Manufacturer Part Number: LM4936MH
• Description: IC,Audio Amplifier,DUAL,TSSOP,28PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LM4936MH

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

www.national.com
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 2, the LM4936 output stage consists of
two pairs of operational amplifiers, forming a two-channel
(channel A and channel B) stereo amplifier. (Though the
following discusses channel A, it applies equally to channel
B.)
Figure 2 shows that the first amplifier’s negative (-) output
serves as the second amplifier’s input. This results in both
amplifiers producing signals identical in magnitude, but 180˚
out of phase. Taking advantage of this phase difference, a
load is placed between −OUTA and +OUTA and driven dif-
ferentially (commonly referred to as “bridge mode”). This
results in a differential gain of
Bridge mode amplifiers are different from single-ended am-
plifiers that drive loads connected between a single amplifi-
er’s output and ground. For a given supply voltage, bridge
mode has a distinct advantage over the single-ended con-
figuration: its differential output doubles the voltage
swing across the load. This produces four times the output
power when compared to a single-ended amplifier under the
same conditions. This increase in attainable output power
assumes that the amplifier is not current limited or that the
output signal is not clipped. To ensure minimum output sig-
nal clipping when choosing an amplifier’s closed-loop gain,
refer to the Audio Power Amplifier Design section.
Another advantage of the differential bridge output is no net
DC voltage across the load. This is accomplished by biasing
channel A’s and channel B’s outputs at half-supply. This
eliminates the coupling capacitor that single supply, single-
ended amplifiers require. Eliminating an output coupling ca-
pacitor in a single-ended configuration forces a single-supply
amplifier’s half-supply bias voltage across the load. This
increases internal IC power dissipation and may perma-
nently damage loads such as speakers.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful single-ended or bridged amplifier. Equation (2)
states the maximum power dissipation point for a single-
ended amplifier operating at a given supply voltage and
driving a specified output load.
However, a direct consequence of the increased power de-
livered to the load by a bridge amplifier is higher internal
power dissipation for the same conditions.
The LM4936 has two operational amplifiers per channel. The
maximum internal power dissipation per channel operating in
the bridge mode is four times that of a single-ended ampli-
fier. From Equation (3), assuming a 5V power supply and a
4Ω load, the maximum single channel power dissipation is
1.27W or 2.54W for stereo operation.
The LM4936’s power dissipation is twice that given by Equa-
tion (2) or Equation (3) when operating in the single-ended
P
P
DMAX
DMAX
= 4 * (V
= (V
A
DD
VD
DD
)
2
= 2 * (R
/(2π
)
2
/(2π
2
R
2
L
R
) Single-Ended
f
/R
L
) Bridge Mode
i
)
(Continued)
(1)
(2)
(3)
18
mode or bridge mode, respectively due to stereo operation.
Twice the maximum power dissipation point given by Equa-
tion (3) must not exceed the power dissipation given by
Equation (4):
The LM4936’s T
to a DAP pad that expands to a copper area of 2in
PCB, the LM4936MH’s θ
temperature T
nal power dissipation supported by the IC packaging. Rear-
ranging Equation (4) and substituting P
sults in Equation (5). This equation gives the maximum
ambient temperature that still allows maximum stereo power
dissipation without violating the LM4936’s maximum junction
temperature.
For a typical application with a 5V power supply and an 4Ω
load, the maximum ambient temperature that allows maxi-
mum stereo power dissipation without exceeding the maxi-
mum junction temperature is approximately 45˚C for the MH
package.
Equation (6) gives the maximum junction temperature
T
reduce the maximum junction temperature by reducing the
power supply voltage or increasing the load resistance. Fur-
ther allowance should be made for increased ambient tem-
peratures.
The above examples assume that a device is a surface
mount part operating around the maximum power dissipation
point.
If the result of Equation (3) multiplied by 2 for stereo opera-
tion is greater than that of Equation (4), then decrease the
supply voltage, increase the load impedance, or reduce the
ambient temperature. If these measures are insufficient, a
heat sink can be added to reduce θ
created using additional copper area around the package,
with connections to the ground pin(s), supply pin and ampli-
fier output pins. External, solder attached SMT heatsinks
such as the Thermalloy 7106D can also improve power
dissipation. When adding a heat sink, the θ
θ
pedance, θ
θ
Typical Performance Characteristics curves for power dis-
sipation information at lower output power levels.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically
use a 10µF in parallel with a 0.1µF filter capacitor to stabilize
the regulator’s output, reduce noise on the supply line, and
improve the supply’s transient response. However, their
presence does not eliminate the need for a local 1µF tanta-
lum bypass capacitance connected between the LM4936’s
supply pins and ground. Do not substitute a ceramic capaci-
tor for the tantalum. Doing so may cause oscillation. Keep
JC
SA
JMAX
, θ
is the sink-to-ambient thermal impedance.) Refer to the
. If the result violates the LM4936’s 150˚C T
CS
, and θ
CS
A
is the case-to-sink thermal impedance, and
, use Equation (4) to find the maximum inter-
SA
JMAX
T
P
T
A
DMAX
. (θ
JMAX
= T
JC
= 150˚C. In the MH package soldered
' = (T
JMAX
= P
JA
is the junction-to-case thermal im-
is 41˚C/W. At any given ambient
DMAX
JMAX
– 2*P
θ
− T
DMAX
JA
JA
A
. The heat sink can be
+ T
)/θ
DMAX
θ
JA
A
JA
JA
for P
is the sum of
DMAX
2
JMAX
on a
' re-
(4)
(5)
(6)
,