LM12458CIV National Semiconductor, LM12458CIV Datasheet - Page 5

A/D Converter (A-D) IC

LM12458CIV

Manufacturer Part Number
LM12458CIV
Description
A/D Converter (A-D) IC
Manufacturer
National Semiconductor
Datasheet

Specifications of LM12458CIV

Resolution (bits)
13bit
Sampling Rate
114kSPS
Input Channel Type
Differential, Single Ended
Data Interface
Parallel
No. Of Pins
44
Input Channels Per Adc
8
Mounting Type
Surface Mount
No. Of Channels
1
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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DNL
V
V
V
PSS
C
C
t
t
t
t
C
A
Z
CAL
Symbol
IN+
IN−
IN+
REF
IN
Converter Characteristics
The following specifications apply to the LM12454, LM12458, and LM12H458 for V
12-bit + sign conversion mode, f
V
otherwise specified. Boldface limits apply for T
Converter AC Characteristics
The following specifications apply to the LM12454, LM12458, and LM12H458 for V
12-bit + sign conversion mode, f
V
otherwise specified. Boldface limits apply for T
Symbol
REF+
REF+
− V
IN−
and V
and V
Clock Duty Cycle
Conversion Time
Acquisition Time
Auto-Zero Time
Full Calibration Time
Throughput Rate (Note 18)
REF−
REF−
8-Bit + Sign and “Watchdog” Mode
Differential Non-Linearity
8-Bit + Sign and “Watchdog” Mode
Zero Error
8-Bit + Sign and “Watchdog” Full-Scale
Error
8-Bit + Sign and “Watchdog” Mode
DC Common Mode Error
Multiplexer Channel-to-Channel
Matching
Non-Inverting Input Range
Inverting Input Range
Differential Input Voltage Range
Common Mode Input Voltage Range
Power Supply
Sensitivity (Note
15)
V
Selected Multiplexer Channel Input
Capacitance
REF+
≤ 25Ω, fully-differential input with fixed 2.5V common-mode voltage, and minimum acquisition time unless
≤ 25Ω, fully-differential input with fixed 2.5V common-mode voltage, and minimum acquisition time unless
Parameter
/V
REF−
Input Capacitance
Parameter
CLK
CLK
Zero Error
Full-Scale Error
Linearity Error
= 8.0 MHz (LM12H458) or f
= 8.0 MHz (LM12H458) or f
13-Bit Resolution, Sequencer
State S5 (Figure 15)
9-Bit Resolution, Sequencer State
S5 (Figure 15)
Sequencer State S7 (Figure 15)
Built-in minimum for 13-Bits
Built-in minimum for 9-Bits and
“Watchdog” mode
Sequencer State S2 (Figure 15)
Sequencer State S2 (Figure 15)
LM12H458
(Notes 6, 7, 8, 9) (Continued)
A
A
(Notes 6, 7, 8, 9)
= T
= T
Conditions
J
J
After Auto-Zero
V
V
= T
= T
A
REF+
+ = V
MIN
MIN
= 4.5V, V
5
to T
to T
D
CLK
CLK
+ = 5V
Conditions
MAX
MAX
= 5.0 MHz (LM12454/8), R
= 5.0 MHz (LM12454/8), R
; all other limits T
; all other limits T
REF−
±
10%
= GND
4944 (t
(Note 10)
44 (t
21 (t
76 (t
Typical
9 (t
2 (t
142
50
89
CLK
CLK
A
A
CLK
CLK
CLK
+ = V
+ = V
CLK
)
)
)
)
)
)
A
A
D
D
(Note 10)
= T
= T
+ = 5V, V
Typical
+ = 5V, V
4944 (t
±
±
±
±
±
44 (t
21 (t
76 (t
Limits (Note 11)
9 (t
2 (t
0.05
85
75
J
J
1/8
0.2
0.4
0.2
S
S
= 25˚C.
= 25˚C.
CLK
CLK
= 25Ω, source impedance for
= 25Ω, source impedance for
CLK
CLK
CLK
CLK
140
40
60
88
) + 50 ns
) + 50 ns
REF+
REF+
) + 50 ns
) + 50 ns
) + 50 ns
) + 50 ns
(Note 11)
Limits
±
GND
GND
−V
GND
±
±
±
= 5V, V
= 5V, V
V
V
V
V
1.75
±
3/4
1/2
1/2
A
A
A
A
2
A
+
+
+
+
+
REF−
REF−
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kHz (min)
kHz (min)
LSB (max)
LSB (max)
LSB (max)
LSB (max)
LSB (max)
% (max)
% (min)
V (max)
V (max)
V (max)
V (max)
V (min)
V (min)
V (min)
V (min)
Units
(max)
(max)
(max)
(max)
(max)
(max)
= 0V,
= 0V,
Units
LSB
LSB
LSB
%
pF
pF

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