IS61LV12816L-10T INTEGRATED SILICON SOLUTION (ISSI), IS61LV12816L-10T Datasheet - Page 8

• Manufacturer Part Number: IS61LV12816L-10T
• Description: 2Mb,High-Speed,Async,128K X 16,10ns,3.3v,44 Pin TSOP II
• Manufacturer: INTEGRATED SILICON SOLUTION (ISSI)

Specifications of IS61LV12816L-10T

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
IS61LV12816L
8
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to
2. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
WC
SCE
AW
HA
SA
SD
HD
HZWE
LZWE
PBW
PWE
PWE
3.0V and output loading specified in Figure 1.
to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced
to the rising or falling edge of the signal that terminates the write.
1
2
(3)
(3)
Parameter
Write Cycle Time
CE to Write End
Address Setup Time
to Write End
Address Hold from Write End
Address Setup Time
LB, UB Valid to End of Write
WE Pulse Width (OE = HIGH)
WE Pulse Width (OE = LOW)
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
Integrated Silicon Solution, Inc. — www.issi.com —
Min.
6.5
6.5
—
8
7
7
0
0
6
4
0
0
-8 ns
Max
—
—
—
—
—
—
—
—
—
—
—
3
(1,3)
Min. Max.
10
—
8
8
0
0
7
8
5
0
0
8
-10 ns
(Over Operating Range)
—
—
—
—
—
—
—
—
—
—
—
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ISSI
1-800-379-4774
10/27/05
Rev. F
®