EP7309-CR Cirrus Logic Inc, EP7309-CR Datasheet - Page 19

• Manufacturer Part Number: EP7309-CR
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc

Specifications of EP7309-CR

• Controller Family/series: (ARM7)
• Core Size: 32 Bit
• No. Of Timers 8/12/16/32 Bits: 0 / 0 / 2 / 0
• Interface: SSI, UART
• Embedded Interface Type: SSI, UART
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Static Memory Burst Write Cycle
DS507F1
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E X P C L K
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Note:
1. Four cycles are shown in the above diagram (minimum wait states, 1-1-1-1). This is the maximum number of consecutive
cycles that can be driven. The number of consecutive cycles can be programmed from 2 to 4, inclusively.
2. The cycle time can be extended by integer multiples of the clock period (22 ns at 45 MHz, 27 ns at 36 MHz, 54 ns at
18.432 MHz, and 77 ns at 13 MHz), by either driving EXPRDY low and/or by programming a number of wait states. EXPRDY is
sampled on the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock period
where EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY, but is shown for clarity.
3. Zero wait states for sequential writes is not permitted for memory devices which use nMWE pin, as this cannot be driven with
valid timing under zero wait state conditions.
4. Address, Data, Halfword, Word, and Write hold state until next cycle.
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Figure 6. Static Memory Burst Write Cycle Timing Measurement
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©
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Copyright Cirrus Logic, Inc. 2005
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(All Rights Reserved)
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High-Performance, Low-Power System on Chip
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EP7309
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