EP7309-CR Cirrus Logic Inc, EP7309-CR Datasheet - Page 15

• Manufacturer Part Number: EP7309-CR
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc

Specifications of EP7309-CR

• Controller Family/series: (ARM7)
• Core Size: 32 Bit
• No. Of Timers 8/12/16/32 Bits: 0 / 0 / 2 / 0
• Interface: SSI, UART
• Embedded Interface Type: SSI, UART
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Static Memory Burst Read Cycle
DS507PP1
EXPRDY
EXPCLK
WRITE
WORD
WORD
nMWE
nMOE
HALF
nCS
A
D
Note:
1. Four cycles are shown in the above diagram (minimum wait states, 1-0-0-0). This is the maximum number of consecutive
2. The cycle time can be extended by integer multiples of the clock period (27 ns at 36 MHz, 54 ns at 18.432 MHz, and
3. Consecutive reads with sequential access enabled are identical except that the sequential access wait state field is used to
cycles that can be driven. The number of consecutive cycles can be programmed from 2 to 4, inclusively.
77 ns at 13 MHz), by either driving EXPRDY low and/or by programming a number of wait states. EXPRDY is sampled on
the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock period where
EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY, but is shown for clarity.
determine the number of wait states, and no idle cycles are inserted between successive non-sequential ROM/expansion
cycles. This improves performance so the SQAEN bit should always be set where possible.
t
CSd
t
Ad
t
WRd
t
MOEd
t
t
HWd
WDd
Figure 4. Static Memory Burst Read Cycle Timing Measurement

Copyright 2001 Cirrus Logic (All Rights Reserved)
t
EXs
t
EXh
t
Ah
t
Ds
t
Dh
t
Ah
t
Ds
t
Dh
High-Performance, Low-Power System on Chip
t
Ah
t
Ds
t
Dh
t
Ds
t
Dh
t
t
MOEh
CSh
EP7309
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