DSPIC30F6010AT-30I/PF Microchip Technology, DSPIC30F6010AT-30I/PF Datasheet
DSPIC30F6010AT-30I/PF
Specifications of DSPIC30F6010AT-30I/PF
Available stocks
Related parts for DSPIC30F6010AT-30I/PF
DSPIC30F6010AT-30I/PF Summary of contents
Page 1
... Running ICD Self Test ...Passed MPLAB ICD 2 Ready The errata described in this section will be addressed in future revisions of dsPIC30F6010 silicon. © 2008 Microchip Technology Inc. dsPIC30F6010 Silicon Errata Summary The following list summarizes the errata described in further detail through the remainder of this document: 1 ...
Page 2
... When the I addressing using the same address bits (A10 and A9) as other I not work as expected. During Row Erase of Program Flash MIPS should ensure the slave module is configured for 10-bit 2 C devices, the A10 and A9 bits may © 2008 Microchip Technology Inc. ) ...
Page 3
... The following sections describe the errata and work around to these errata, where they may apply. © 2008 Microchip Technology Inc. dsPIC30F6010 1. Module: Data EEPROM – Speed At device throughput is greater than 20 MIPS for V in the range 4 ...
Page 4
... NC, L0 daw.b w2 bset.b SR, #C bra L1 L0:daw.b w2 L1: .... Instruction DAW.b CHECK CARRY BIT BEFORE DAW.b ;First BCD number ;Second BCD number ;If C set ;If not,do DAW and ;set the carry bit ;and exit © 2008 Microchip Technology Inc. ...
Page 5
... PSV access to move the source operand from program memory to RAM register prior to performing the operations listed in Table 1. The work around for Example 2 is demonstrated in Example 3. © 2008 Microchip Technology Inc. (2) Examples of Incorrect Operation ADDC W0, [W1++], W2 ; SUBB.b W0, [++W1 ...
Page 6
... If work around #1 is not feasible due to application real-time constraints, the user precautions to ensure that a write operation performed on a location in Y data memory is not immediately followed by a instruction that performs a read operation of a location in Y data memory. © 2008 Microchip Technology Inc. may take DSP MAC-type ...
Page 7
... CLR A BTSC SR, #OB CLR B BCLR INTCON1, #MATHERR RETFIE © 2008 Microchip Technology Inc. 9. Module: Interrupting a REPEAT Loop When interrupt NSTDIS(INTCON1<15>) bit is ‘0’), the following sequence of events will lead to an address error trap: 1. REPEAT loop is active interrupt is generated during the execution of the REPEAT loop ...
Page 8
... None. However, the user may use a timer interrupt and write to the associated PORT register to control the pin manually. 14. Module: QEI – Reset on Index Pulse Mode For this release of silicon, the QEI module should not be operated in the Reset on Index Pulse mode. Work around None. © 2008 Microchip Technology Inc ...
Page 9
... Results are shown here for the PWM1H and PWM1L pins only. Similar results will be observed for any other pair of complementary output pins (PWM2H/L, PWM3H/L and PWM4H/L) and any other chosen duty cycle. © 2008 Microchip Technology Inc. 17. Module: Motor Control PWM – The input clock to the PWM time base has ...
Page 10
... MPLAB C30 v1.20.02 toolsuite. The function has the following prototype: unsigned__builtin_readsfr(volatile void *); The function argument is the address of a 16-bit SFR. This function should only be used to read the CAN SFRs. © 2008 Microchip Technology Inc. in the DD in the DD Informatik’s ...
Page 11
... V Range Temp Range DD (in volts) (in °C) 4.75 to 5.5 -40 to +85 4.75 to 5.5 -40 to +125 Note 1: Applications that use the CAN peripherals and Data EEPROM should also refer to Errata 1. and 21. © 2008 Microchip Technology Inc. dsPIC30F6010 ) (1) Max MIPS dsPIC30FXXX-30I dsPIC30FXXX-20I 30 20 — — ...
Page 12
... One may use a large DISI value and then set the DISICNT register to zero, as shown in Example 12. A macro may also be used to perform this task, as shown in Example 13. // protect CPU IPL modification // set CPU IPL remove DISI protection // safely modify the CPU IPL Interrupts © 2008 Microchip Technology Inc. ...
Page 13
... IFSxbits.QEIIF = 0; POSCNT_b15 ^= 0x8000; // Overflow or Underflow } © 2008 Microchip Technology Inc. 28. Module: CAN The CAN module does not cause a filter match with filters 3, 4 and baud rate of more than 500 kbps. Work around Use only filters 0, 1 and 2 with a baud rate of more than 500 kbps ...
Page 14
... Sleep mode. Example 15 demonstrates the work around described above would apply to a dsPIC30F6010 device. ; Ensure flag is reset ; Return from Interrupt Service Routine the function call would be following the or _GotoSleep © 2008 Microchip Technology Inc. ...
Page 15
... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2008 Microchip Technology Inc. Work around 3: Instead of executing a PWRSAV #0 instruction to put the device into Sleep mode, perform a clock switch to the 32 kHz Low-Power (LP) Oscillator with a 64:1 postscaler mode ...
Page 16
... Module: Motor Control PWM – PWM Counter Register If the PTDIR bit is set (when PTMR is counting down), and the CPU execution is halted (after a breakpoint is reached), PTMR will start counting PTDIR was zero. Work around None. © 2008 Microchip Technology Inc slave Interrupt 2 C nodes receive 2 ...
Page 17
... Clock Failure Status bit (OSCCON<3>). If this bit is clear, return from the trap service routine immediately and continue program execution. © 2008 Microchip Technology Inc. dsPIC30F6010 36. Module: PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of an PSV page ...
Page 18
... For example, if the SDA and SCL pins are shared with the UART and SPI pins, and the UART has higher precedence on the port latch pin. DS80195H-page module is that have 2 C © 2008 Microchip Technology Inc. ...
Page 19
... Port – Port Pin Multiplexed with IC1). Revision G (5/2008) 2 Added silicon issues 34 and 35 (I C), and 36 (Timer). Revision H (9/2008) 2 Replaced issues 30 and with issue 39 (I Added silicon issues 35 (PLL Lock Status Bit), 36 (PSV 2 Operations) and 37-39 (I C). © 2008 Microchip Technology Inc. 2 C), 32 (Motor 2 C). dsPIC30F6010 DS80195H-page 19 ...
Page 20
... NOTES: DS80195H-page 20 © 2008 Microchip Technology Inc. ...
Page 21
... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
Page 22
... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...