DSPIC30F2023T-30I/ML Microchip Technology, DSPIC30F2023T-30I/ML Datasheet - Page 7
![12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 QFN 8x8x0.9m](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC30F2023T-30I/ML
Manufacturer Part Number
DSPIC30F2023T-30I/ML
Description
12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 QFN 8x8x0.9m
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2023T-30I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2023T-30I/MLTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2023T-30I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
11. Module: PWM Override Enable
© 2008 Microchip Technology Inc.
The OVRDAT<1:0> bits in the IOCONx register
should determine the state of the PWMx output
pins when the OVRENH and OVRENL bits
(IOCONx<9:8>) are set. However, the PWM
override feature does not work correctly. The
PWMxH and PWMxL pins do not exhibit the state
specified by the OVRDAT<1:0> bits when only one
of the override bits (OVRENH or OVRENL) is set.
If both bits are set, the override state is exhibited
correctly on the PWMxL and PWMxH pins.
Work around
If override capability is desired on only one of the
PWM pin pairs, use the GPIO module to override
the PWM outputs. This can be done using the
PENH and PENL bits in the IOCONx register.
When the PENH/PENL bits in the IOCONx
register. When the PENH/PENL bits are cleared,
the GPIO module assumes control of the
PWMxH/L output pin. The GPIO module must be
set up in advance for the desired override output
states, and the pins must be configured as digital
outputs. This includes setting the PORTx and
TRISx registers correctly, which correspond to the
PWMxH and PWMxL pins.
dsPIC30F1010/202X
DS80290J-page 7