DSPIC30F1010T-30I/SO Microchip Technology, DSPIC30F1010T-30I/SO Datasheet - Page 106
DSPIC30F1010T-30I/SO
Manufacturer Part Number
DSPIC30F1010T-30I/SO
Description
6KB, Flash, 256bytes-RAM, 30MIPS, 21I/O, 16-bit Family,nanoWatt 28 SOIC .300in T
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F1010T-30I/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
6KB (2K x 24)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
16 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
21
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCK
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
DSPIC30F1010T-30I/SOTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F1010T-30I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- AC164335 PDF datasheet
- DM300023 PDF datasheet #2
- DM300023 PDF datasheet #3
- DSPIC30F2011-20ISO PDF datasheet #4
- DSPIC30F2011-20IP PDF datasheet #5
- DSPIC30F1010-30ISO PDF datasheet #6
- DSPIC30F1010-30ISO PDF datasheet #7
- Current page: 106 of 286
- Download datasheet (5Mb)
dsPIC30F1010/202X
FIGURE 11-1:
11.7
The output compare channels have the ability to gener-
ate an interrupt on a compare match, for whichever
Match mode has been selected.
For all modes except the PWM mode, when a compare
event occurs, the respective interrupt flag (OCxIF) is
asserted and an interrupt will be generated, if enabled.
The OCxIF bit is located in the corresponding IFS
STATUS register, and must be cleared in software. The
interrupt is enabled via the respective compare inter-
rupt enable (OCxIE) bit, located in the corresponding
IEC Control register.
For the PWM mode, when an event occurs, the respec-
tive timer interrupt flag (T2IF or T3IF) is asserted and
an interrupt will be generated, if enabled. The IF bit is
located in the IFS0 STATUS register, and must be
cleared in software. The interrupt is enabled via the
respective timer interrupt enable bit (T2IE or T3IE),
located in the IEC0 Control register. The output com-
pare interrupt flag is never set during the PWM mode of
operation.
DS70178C-page 104
Output Compare Interrupts
OCxR = OCxRS
TMR3 = PR3
(Interrupt Flag)
T3IF = 1
PWM OUTPUT TIMING
Duty Cycle
TMR3 = Duty Cycle (OCxR)
Period
Preliminary
OCxR = OCxRS
TMR3 = PR3
(Interrupt Flag)
T3IF = 1
TMR3 = Duty Cycle (OCxR)
© 2006 Microchip Technology Inc.
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