DSPIC30F1010T-30I/MM Microchip Technology, DSPIC30F1010T-30I/MM Datasheet - Page 21

• Manufacturer Part Number: DSPIC30F1010T-30I/MM
• Description: 6KB, Flash, 256bytes-RAM, 30MIPS, 21I/O, 16-bit Family,nanoWatt 28 QFN-S 6x6mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010T-30I/MM

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-QFN
• Data Bus Width: 16 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCK
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: DSPIC30F1010T-30I/MMTR

8.5.5
The PROGC command programs data to the specified
Configuration register and verifies whether the
programming was successful. Configuration registers
are 16 bits wide, and this command allows one Config-
uration register to be programmed.
Expected Response (2 words):
0x1600
0x0002
© 2010 Microchip Technology Inc.
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
Data
Note:
Opcode
Field
Reserved
12 11
PROGC COMMAND
This command can only be used for
programming Configuration registers.
0x6
0x4
0x0
MSB of 24-bit destination address
LS 16 bits of 24-bit destination
address
Data to program
Addr_LS
Data
8 7
Description
Length
Addr_MSB
0
8.5.6
The ERASEB command performs a Bulk Erase. The MS
field selects the memory to be bulk erased, with options
for erasing individual memory segments.
When Full Chip Erase is selected, the following
memory regions are erased:
• All code memory (even if code-protected)
• All code-protect Configuration registers, including
Only the executive code memory, device ID and
Configuration registers that are not code-protected
remain intact after a Full Chip Erase.
Expected Response (2 words):
0x1700
0x0002
15
Opcode
Length
Reserved 0x0
MS
Opcode
Unit ID
Field
12 11
ERASEB COMMAND
0x7
0x2
Select memory to erase:
interrupt vectors, and FGS Configuration
register
Segments, and the FBS and FGS
Configuration registers
and the FGS Configuration register
0x0 = All Code in General Segment
0x1 = Reserved
0x2 = All Code in General Segment,
0x3 = Full Chip Erase
0x4 = All Code in Boot and General
0x5 = All Code in General Segment,
0x6 = Reserved
0x7 = Reserved
Reserved
Description
Length
DS70284C-page 21
2
MS
0