DSPIC30F1010T-30I/MM Microchip Technology, DSPIC30F1010T-30I/MM Datasheet - Page 19

6KB, Flash, 256bytes-RAM, 30MIPS, 21I/O, 16-bit Family,nanoWatt 28 QFN-S 6x6mm T

DSPIC30F1010T-30I/MM

Manufacturer Part Number
DSPIC30F1010T-30I/MM
Description
6KB, Flash, 256bytes-RAM, 30MIPS, 21I/O, 16-bit Family,nanoWatt 28 QFN-S 6x6mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F1010T-30I/MM

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
6KB (2K x 24)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Data Bus Width
16 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
21
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCK
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
DSPIC30F1010T-30I/MMTR
dsPIC30F1010/202X
APPENDIX A:
REVISION HISTORY
Revision A (8/2006)
First release of the document.
Revision B (10/2006)
Added silicon issues 3, 8, 11 and 12.
Revision C (12/2006)
Added silicon issues 13, 14, 15, 16, 17 and 18.
Revision D (12/2006)
Updated silicon issues 15 and 16.
Revision E (3/2007)
Updated silicon issue 15. Added silicon issues 19, 20,
21, 22, 23, 24, 25, 26, 27, 28.
Revision F/G (10/2007)
Updated silicon issues 6 (ADC Module: Shared Sample
and Hold Circuit), 11 (PWM Override Enable), 14
(Output Compare Module in PWM Mode), 15 (SPI
Module in Frame Master Mode), 16 (SPI Module in
Slave Select Mode) and 17 (SPI Module).
Added silicon issues 29-30 (UART Module), 31
(Output Compare Module), 32-34 (PWM Duty Cycle),
35 (CPU – DAW.b instruction) and 36 (Sleep Mode).
Revision H (5/2008)
Updated silicon issue 32 (PWM Duty Cycle).
Changed title of silicon issue 34 (PWM Override
Priority) to be consistent with summary title.
Added silicon issues 37 (PWM Module), 38 (PWM
Module),
39 (Power
Supply
PWM),
40
(UART
Module), 41 (UART Module), 42 (SPI Module), 43
2
2
(I
C Module), and 44 (I
C Module).
Revision J (7/2008)
Updated silicon issue 37 (PWM Module) and added
2
2
issues 45 (I
C Module), 46 (I
C Module), 47 (UART
(FIFO Error Flags)) and 48 (PSV Operations).
© 2008 Microchip Technology Inc.
DS80290J-page 19

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