DS92001TLD National Semiconductor, DS92001TLD Datasheet - Page 4
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DS92001TLD
Manufacturer Part Number
DS92001TLD
Description
IC,Repeater Interface,LLCC,8PIN,PLASTIC
Manufacturer
National Semiconductor
Datasheet
1.DS92001TLD.pdf
(12 pages)
Specifications of DS92001TLD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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LVDS OUTPUT AC SPECIFICATIONS (OUT)
t
t
t
t
t
t
t
f
LVCMOS/LVTTL AC SPECIFICATIONS (LOS)
t
t
t
t
Symbol
HLT
PHZ
PLZ
PZH
PZL
DJ
RJ
MAX
PHLLOS
PLHLOS
LHLOS
HLLOS
AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 3)
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except V
V
Note 3: All typical are given for V
Note 4: Output short circuit current (I
Note 5: The parameters are guaranteed by design. The limits are based on statistical analysis of the device performance over the PVT (process, voltage and
temperature) range.
Note 6: t
the same channel (a measure of duty cycle).
Note 7: t
applies to devices at the same V
Note 8: t
operating temperature and voltage ranges, and across process distribution. t
Note 9: The parameters are guaranteed by design. The limits are based on statistical analysis of the device performance over the PVT range with the following test
equipment setup: Agilent 86130A used as stimulus, 5 feet of RG142B cable with DUT test board and Agilent 86100A (digital scope mainframe) with Agilent 86122A
(20GHz scope module). Data input jitter pk to pk = 22 picoseconds; Clock input jitter = 24 picoseconds; t
picoseconds.
Note 10: Propagation delay, rise and fall times are guaranteed by design and characterization to 200MHz. Generator for these tests: 50MHz ≤ f ≤ 200MHz, Zo =
50Ω, tr, tf ≤ 0.5ns. Generator used was HP8130A (300MHz capability).
Note 11: f
is guaranteed by design and characterization. A minimum is specified, which means that the device will operate to specified conditions from DC to the minimum
guaranteed AC frequency. The typical value is always greater than the minimum guarantee.
TL
, and ∆V
SKD1
SKD3
SKD4
MAX
Fall Time (Notes 5, 10)
80% to 20% points
Disable Time (Active High to Z) R
Disable Time (Active Low to Z) Figure 6 and Figure 7
Enable Time (Z to Active High)
Enable Time (Z to Active Low)
LVDS Data Jitter, Deterministic
(Peak-to-Peak) (Note 9)
LVDS Clock Jitter, Random
(Note 9)
Maximum guaranteed
frequency
(Note 11)
LVTTL Propagation Delay High
to Low (Note 5)
LVTTL Propagation Delay Low
to High (Note 5)
Rise Time
20% to 80% (Note 5)
Fall Time
80% to 20% (Note 5)
OD
, |t
, Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification
, Part to Part Skew, is the differential channel-to- channel skew of any event between devices. This specification applies to devices over recommended
. V
test: Generator (HP8133A or equivalent), Input duty cycle = 50%. Output criteria: VOD ≥ 200mV, Duty Cycle better than 45/55%. This specification
PLHD
OD
has a value and direction. Positive direction means OUT+ is a more positive voltage than OUT−.
− t
Parameter
PHLD
|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of
CC
CC
and within 5˚C of each other within the operating temperature range. This parameter guaranteed by design and characterization.
= +3.3V and T
OS
) is specified as magnitude only, minus sign indicates direction only.
A
V
400Mbps (NRZ)
V
V
CL = 10pF, IN− = 1V, 1V ≤ IN+ ≤ 1.3V,
Freq. = 10MHz, 50% Duty Cycle
Figures 8, 9
= +25˚C, unless otherwise stated.
ID
ID
ID
L
= 50Ω, C
= 300mV; PRBS = 2
= 300mV; V
= 200mV, V
(Continued)
L
= 15pF
CM
CM
SKD4
= 1.2V at 200MHz clock
= 1.2V
Conditions
4
is defined as |Max − Min| differential propagation delay.
23
− 1 data; V
CM
= 1.2V at
DJ
measured 100 picoseconds, t
0.350
Min
200
10
2
1
1
Typ
100
100
300
0.6
1.3
15
3
3
5
2
RJ
Max
120
120
1.0
25
25
78
36
20
10
3
3
measured 60
ID
, V
OD
, V
Units
MHz
ns
ns
ns
ns
ns
ps
ps
ns
ns
ns
ns
TH
,